Unified Flash Memory Pump for Program and Erase Voltage Generation

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Solution Overview

Problem

Flash memory devices require separate high voltage pumps and regulators for program and erase operations, which occupy significant space and reduce integration density.

Innovation Solution

A unified pump and regulator structure with a control circuit that generates program and erase voltages based on operational mode, using a voltage divider, comparator, and clock driver to maintain output voltage at a target level, and a step signal generator to iteratively adjust voltage during program loops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate high voltage pumps and regulators are used for program and erase operations, then the required voltages can be generated reliably, but the chip area occupied increases significantly

Engineering Contradiction:
Improvevoltage generation reliabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple high voltage pumps (program voltage pump and erase voltage pump) and their associated regulators into a single unified pump structure. This single pump can generate both program voltage (Vpgm) and erase voltage (Verase) by selectively connecting different internal nodes to the output, thereby reducing the total chip area occupied while maintaining reliable voltage generation for both operations

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The unified pump structure is designed to perform multiple functions: it can operate as a program voltage pump to generate Vpgm, as an erase voltage pump to generate Verase, and can be controlled through a single regulator. The pump includes multiple internal nodes that can be selectively connected to the output to provide different voltage levels, making it a universal voltage generation solution that eliminates the need for separate dedicated pumps for each operation

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If multiple separate pumps are used to generate different voltages, then each voltage can be optimized for its specific operation, but the integration density of the flash memory decreases

Engineering Contradiction:
Improvevoltage optimization for specific operationsVSAvoidintegration density
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent merges multiple voltage generation functions into a single integrated pump structure that can produce both program voltage and erase voltage. By combining what were previously separate physical components into one unified structure, the integration density increases while the pump retains the ability to provide operation-optimized voltages through selective internal node connections

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The unified pump is designed with multi-functionality to maintain voltage optimization for different operations. It includes multiple internal nodes at different voltage levels that can be selectively connected to the output based on the operation mode (program or erase), allowing each operation to receive its optimally optimized voltage while sharing a common pump structure

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7684246B2Flash memory device having pump with multiple output voltages
Publication Date: 2010.03.23 SAMSUNG ELECTRONICS CO LTD
  • US7684246B2 patent drawing
  • US7684246B2 patent drawing
  • US7684246B2 patent drawing

AI summary

A flash memory device may include a pump, a regulator to control the pump so that an output voltage of the pump is substantially maintained at a target voltage, and a control circuit to control the regulator so that the pump selectively generates a program voltage or an erase voltage. In some embodiments, the output voltage of the pump may be stepped in response to program loop iterations during a program operation, or set to a target voltage during an erase operation.