Unified Hardware Pipeline for Transcendental Function Computation
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Solution Overview
Problem
Graphics processor chips face inefficiencies due to large gate counts from separate hardware implementations of mathematical functions like reciprocal, square root, exponential, and logarithmic functions, which are not optimized for high-speed and low-power consumption demands.
Innovation Solution
A unified hardware pipeline is introduced that uses a single set of data look-up tables and interpolation functions to compute these functions efficiently, reducing the number of cycles required for calculations and minimizing gate count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate hardware implementations of mathematical functions are used, then each function can be implemented with dedicated circuitry, but the gate count becomes large and power consumption increases
Solution Approach 1:
The patent combines multiple separate mathematical function implementations (reciprocal, square root, exponential, logarithmic) into a single unified hardware pipeline. This merging eliminates the need for separate circuitry blocks for each function, significantly reducing the overall gate count while maintaining dedicated functionality for each mathematical operation through a shared computational infrastructure.
Solution Approach 2:
The unified hardware pipeline is designed to perform multiple mathematical functions using a single set of data look-up tables and interpolation circuits. The system achieves multi-functionality by using universal computational blocks that can be configured for different mathematical operations, thereby reducing device complexity while preserving reliable function implementation.
2Measurement precision
If large data look up tables are used to achieve required precision, then calculation accuracy is improved, but hardware resources and gate count increase
Solution Approach 1:
The patent segments the calculation process into multiple stages: initial approximation using compact look-up tables, followed by iterative refinement through interpolation and correction steps. This segmentation allows the use of smaller look-up tables that store only coarse approximation data, while achieving high precision through subsequent computational refinement stages rather than relying on large exhaustive tables.
Solution Approach 2:
The system performs preliminary approximation using small look-up tables to obtain initial values, then refines these values through iterative interpolation and correction. This preliminary action approach allows the use of compact initial data structures while achieving high precision through subsequent computational steps, avoiding the need for large comprehensive look-up tables.
3Productivity
If multiple separate mathematical function blocks are implemented, then each function can be computed independently, but the overall processing time and power consumption increase
Solution Approach 1:
The patent merges multiple mathematical function computations into a single unified pipeline that processes multiple functions simultaneously. By combining separate function blocks into one integrated system with shared resources (look-up tables, interpolation units, control logic), the system reduces overall processing time and power consumption compared to executing separate independent function blocks.
4Measurement precision
If high precision is required for graphics processing, then more data look up table entries are needed, but this increases hardware complexity and reduces integration efficiency
Solution Approach 1:
The patent segments the precision achievement into multiple computational stages rather than requiring a single large look-up table. The first stage uses compact tables for coarse approximation, and subsequent stages use interpolation and iterative refinement to achieve high precision. This segmentation enables high precision floating-point graphics processing while maintaining integration efficiency and reducing hardware complexity.
Data Source
AI summary
Mathematical functions are computed in a single pipeline performing a polynomial approximation (e.g. a quadratic approximation, or the like) using data tables for RCP, SQRT, EXP or LOG using a single pipeline according and opcodes. SIN and COS are also computed using the pipeline according to the approximation ((−1)^IntX)*Sin(π*Min(FracX, 1.0−FracX)/Min(FracX, 1.0−FracX). A pipeline portion approximates Sin(π*FracX) using tables and interpolation and a subsequent stage multiplies this approximation by FracX. For input arguments of x close 1.0. LOG 2(x−1)/(x−1) is computed using a first pipeline portion using tables and interpolation and subsequently multiplied by (x−1). A DIV operation may also be performed with input arguments scaled up to avoid underflow as needed. Inverse trigonometric functions may be calculated using a pre-processing stage and post processing stage in order to obtain multiple inverse trigonometric functions from a single pipeline.


