Unified Inverse Transform Module for Video Codec Hardware
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Solution Overview
Problem
Conventional HEVC inverse transformers require separate modules for 8×8 and 4×4 inverse transforms, leading to increased processing time and hardware chip area due to the need for distinct modules for different block sizes.
Innovation Solution
A single inverse transform module capable of performing inverse transforms for both 2n×2n and n×n blocks, utilizing a first inverse transform unit for even columns and a second unit for odd columns, with shared coefficients and a butterfly operation module to reduce hardware requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If separate inverse transform modules are used for 8×8 and 4×4 blocks, then processing accuracy is maintained, but hardware chip area increases and processing time increases
Solution Approach 1:
The patent implements a universal inverse transform module that can process both 8×8 and 4×4 blocks. The module uses a single set of transform coefficients that can be applied to both block sizes, with the understanding that 4×4 blocks use only the top-left portion of the coefficients. This eliminates the need for separate inverse transform modules for different block sizes, thereby reducing hardware chip area while maintaining processing accuracy through proper coefficient selection and application.
Solution Approach 2:
The patent merges the functionality of separate 8×8 and 4×4 inverse transform modules into a single unified module. By combining the processing logic and coefficient storage into one module, the patent reduces hardware redundancy and chip area while maintaining the ability to accurately process both block sizes through conditional coefficient application.
2Manufacturing precision
If separate inverse transform modules are used for 8×8 and 4×4 blocks, then processing accuracy is maintained, but processing time increases
Solution Approach 1:
The universal inverse transform module processes both 8×8 and 4×4 blocks using the same hardware resources, eliminating the need to switch between separate modules. This reduces processing overhead and time while maintaining accuracy through proper coefficient selection, as the single module can efficiently handle both block sizes without the latency of module switching.
Solution Approach 2:
By merging the processing capabilities into a single module, the patent eliminates the time penalty associated with having separate modules. The unified module can continuously process different block sizes without the overhead of switching between dedicated modules, thereby reducing total processing time while maintaining transform accuracy.
3Area of stationary object
If a single inverse transform module is used for both 2n×2n and n×n blocks, then hardware chip area is reduced, but device complexity increases
Solution Approach 1:
The patent reduces device complexity by implementing a universal module that handles both block sizes through a standardized coefficient application process. Rather than creating complex control logic to manage multiple modules, the single module uses a straightforward approach of selecting appropriate coefficients based on block size, thereby reducing overall system complexity despite the multi-functional requirement.
Solution Approach 2:
The patent applies local quality by using different portions of the transform coefficients for different block sizes. The 4×4 blocks use only the top-left n×n portion of the coefficients, while 8×8 blocks use the full coefficient set. This localized coefficient application simplifies the control logic needed in the single module, as it only requires selecting the appropriate coefficient subset rather than implementing complex processing differentiation.
4Area of stationary object
If a single inverse transform module is used for both 2n×2n and n×n blocks, then hardware chip area is reduced by 12%, but manufacturing precision may be compromised
Solution Approach 1:
The patent maintains manufacturing precision in the single universal module by implementing proper coefficient selection and application logic. The module correctly applies the appropriate coefficients for each block size, ensuring that 4×4 blocks receive the correct n×n coefficient subset and 8×8 blocks receive the full coefficient set, thereby preserving transform accuracy while achieving the 12% chip area reduction.
Solution Approach 2:
The patent preserves manufacturing precision through local quality application by using different portions of the coefficient matrix for different block sizes. The 4×4 inverse transform uses only the top-left n×n coefficients, while the 8×8 transform uses the complete coefficient set. This localized coefficient usage ensures mathematical accuracy is maintained for both block sizes within the single unified module.
Data Source
AI summary
An inverse transform method and apparatus for a video codec are disclosed. The inverse transformer can include: a first inverse transform unit configured to perform an inverse transform operation on an even column portion of a 2n×2n block or an n×n block sharing inverse transform coefficients; and a second inverse transform unit configured to store coefficients according to a first input mode and a second input mode and configured to select coefficients according to input mode and multiply the selected coefficients with an input value to perform an inverse transform of an odd column portion of a 2n×2n block or an n×n block.