Unified Jump Target Buffer for Multi-Process Prediction
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Solution Overview
Problem
Existing systems face challenges in predicting jump targets efficiently due to increased processor clock speeds, leading to pipeline stage increases and complexity, as per-process return address stacks cannot be shared between processes, resulting in high semiconductor area consumption and system complexity.
Innovation Solution
A system that dynamically shares a high-speed jump-target predictor using a program counter and process state information to look up jump targets, employing a unified dual-ported lookup structure with shared jump-target and return-target buffers, and a jump-type-prediction buffer to predict jump targets for multiple processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a per-process return address stack is used to predict jump targets, then jump target prediction accuracy is improved, but semiconductor area consumption increases and system complexity increases due to inability to share between processes
Solution Approach 1:
The patent merges the return address stack functionality into a unified jump target buffer that is shared across multiple processes. Instead of maintaining separate per-process stacks, the system uses a single buffer indexed by a combination of process identifier and program counter, allowing multiple processes to share the same physical hardware structure for jump target prediction.
Solution Approach 2:
The jump target buffer is designed to serve multiple functions: it acts as a return address stack for subroutine returns, a jump target buffer for conditional jumps, and a history buffer for branch prediction. This multi-functional design eliminates the need for separate dedicated structures for each function, reducing overall semiconductor area while maintaining prediction accuracy.
2Measurement precision
If a per-process return address stack is used to predict jump targets, then jump target prediction accuracy is improved, but system complexity increases due to inability to share between processes
Solution Approach 1:
The patent merges the return address stack functionality into a unified jump target buffer that is shared across multiple processes. Instead of maintaining separate per-process stacks, the system uses a single buffer indexed by a combination of process identifier and program counter, allowing multiple processes to share the same physical hardware structure for jump target prediction.
Solution Approach 2:
The jump target buffer is designed to serve multiple functions: it acts as a return address stack for subroutine returns, a jump target buffer for conditional jumps, and a history buffer for branch prediction. This multi-functional design eliminates the need for separate dedicated structures for each function, reducing overall system complexity while maintaining prediction accuracy.
3Reliability
If the instruction fetch unit waits for jump target calculation, then calculation accuracy is ensured, but processor performance decreases due to pipeline stalls
Solution Approach 1:
The system performs preliminary jump target prediction using the jump target buffer before the actual jump instruction is fully executed. The predicted target address is calculated and stored in advance based on the program counter and process state, allowing the instruction fetch unit to begin fetching the next instruction sequence without waiting for the complete jump target calculation, thus eliminating pipeline stalls while maintaining accuracy through subsequent validation.
Data Source
AI summary
One embodiment of the present invention provides a system that predicts a jump target for a jump instruction. During operation, the system starts fetching the jump instruction while executing a process. Next, the system uses a program counter for the process and uses state information that is specific to the process to look up the jump target for the jump instruction. Finally, the system uses the jump target returned by the lookup as a predicted jump target for the jump instruction.