Unified Memory Controller for Heterogeneous Multi-Chip Package

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Solution Overview

Problem

Current multi-chip package designs for heterogeneous memory devices lack efficient interaction and management between different memory types, such as NAND flash and DRAM, leading to increased costs and complexity due to separate controllers and interfaces.

Innovation Solution

A unified memory controller (UMC) is introduced to manage and facilitate access between different memory types, allowing direct control and data copying between NAND flash and DRAM, reducing the need for separate controllers and optimizing resource sharing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate controllers and interfaces are used for different memory types, then each memory type can be independently managed, but device complexity and cost increase

Engineering Contradiction:
Improveindependent memory managementVSAvoidcontroller and interface complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple separate controllers and interfaces into a single unified memory controller that manages both NAND flash memory and DRAM memory. This consolidation reduces device complexity and cost while maintaining the ability to independently manage different memory types through a single integrated controller that provides both a flash memory interface and a DRAM interface.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If separate controllers are used for flash memory and DRAM, then each memory type has dedicated control, but cost and size increase

Engineering Contradiction:
Improvededicated control for each memory typeVSAvoidnumber of controllers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The unified memory controller performs multiple functions by integrating both flash memory controller capabilities and DRAM controller capabilities into a single device. It provides a flash memory interface for NAND flash memory management and a DRAM interface for DRAM memory management, allowing one controller to universally manage different memory types with dedicated control protocols for each.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If volatile memory is used without non-volatile memory assistance, then access speed is fast, but data persistence is lost when power is removed

Engineering Contradiction:
Improvememory access speedVSAvoiddata persistence
Core Design Contradiction:
SpeedVSDuration of action of stationary object

Solution Approach 1:

The unified memory controller acts as an intermediary that coordinates between volatile DRAM memory and non-volatile NAND flash memory. It enables the fast access characteristics of DRAM while providing data persistence through flash memory by managing data transfers between the two memory types and implementing caching strategies where flash memory assists DRAM operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10185515B2Unified memory controller for heterogeneous memory on a multi-chip package
Publication Date: 2019.01.22 QUALCOMM INC
  • US10185515B2 patent drawing
  • US10185515B2 patent drawing
  • US10185515B2 patent drawing

AI summary

An enhanced multi chip package (eMCP) is provided including a unified memory controller. The UMC is configured to manage different types of memory, such as NAND flash memory and DRAM on the eMCP. The UMC provides storage memory management, DRAM management, DRAM accessibility for storage memory management, and storage memory accessibility for DRAM management. The UMC also facilitates direct data copying from DRAM to storage memory and vice versa. The direct copying may be initiated by the UMC without interaction from a host, or may be initiated by a host.