Unified Memory Architecture for CPU-GPU Task Scheduling

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Solution Overview

Problem

Current computing systems face challenges in managing task scheduling between CPUs and GPUs, including separate memory systems, quality of service guarantees, programming models, and efficient scheduling, which lead to inefficiencies and power consumption issues, especially in heterogeneous processing environments.

Innovation Solution

A unified computing system architecture that includes a CPU and an Accelerated Processing Device (APD) with a software scheduler and kernel mode driver, allowing for fluid task switching and resource management between CPU and GPU, enabling efficient scheduling and resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate memory systems are used for CPU and GPU, then each processor has dedicated memory access, but memory latency and power consumption increase due to chip-to-chip interfaces

Engineering Contradiction:
Improvededicated memory accessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent merges the memory systems of the CPU and GPU into a unified memory architecture, eliminating the need for separate memory systems and chip-to-chip interfaces. This consolidation reduces power consumption while maintaining dedicated memory access capabilities for both processors through shared memory resources.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If separate memory systems are used for CPU and GPU, then each processor has dedicated memory access, but memory overhead becomes unacceptable for fine grain offload

Engineering Contradiction:
Improvededicated memory accessVSAvoidmemory overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines separate memory systems into a unified memory architecture, reducing memory overhead and simplifying the system. This enables fine-grain offload operations by eliminating redundant memory structures and interfaces, while both CPU and GPU can access the shared memory efficiently.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of operation

If inefficient scheduling is used in multiple processing device systems, then process monitoring is required, but GPU hardware cannot be easily identified and preempted

Engineering Contradiction:
Improveprocess monitoringVSAvoidtask switching efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent implements a scheduling mechanism where the system automatically identifies, monitors, and preempts GPU processes without requiring external software intervention. The GPU hardware itself participates in the scheduling decisions, enabling efficient task switching while maintaining ease of process monitoring through built-in scheduling capabilities.

Inventive Principle:
Principle #25Self-service

4Adaptability or versatility

If software monitoring of GPU utilization is implemented, then resource management is possible, but the software burden increases

Engineering Contradiction:
Improveresource managementVSAvoidsoftware burden
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent enables the GPU system to self-manage its own resource utilization and scheduling without requiring heavy software intervention. The hardware includes built-in mechanisms for tracking GPU usage, identifying processes, and making scheduling decisions, thereby reducing the software burden while maintaining adaptability for resource management.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9122522B2Software mechanisms for managing task scheduling on an accelerated processing device (APD)
Publication Date: 2015.09.01 ADVANCED MICRO DEVICES INC
  • US9122522B2 patent drawing
  • US9122522B2 patent drawing
  • US9122522B2 patent drawing

AI summary

Embodiments describe herein provide a method of for managing task scheduling on a accelerated processing device. The method includes executing a first task within the accelerated processing device (APD), monitoring for an interruption of the execution of the first task, and switching to a second task when an interruption is detected.