Unified On-Die Debug Fabric for Multi-Die Processor Tracing
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Solution Overview
Problem
Debugging operations in multi-die processor packages face challenges due to limited pins and connections, different delivery and manufacturing schedules, and the need for both independent and dependent debug solutions across dies, leading to inefficiencies in existing debug infrastructures.
Innovation Solution
An apparatus and method for on-die debug that allows for unified debug solutions across multiple dies, utilizing a shared infrastructure to address both independent and dependent debug requirements, while maintaining efficient power management and off-socket trace capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate debug infrastructures are used for independent and dependent debug solutions, then each debug requirement can be met, but device complexity and inefficiency increase
Solution Approach 1:
The patent implements a unified debug infrastructure that serves multiple functions: independent die debugging, dependent die debugging, power management, and off-socket trace capabilities. The shared infrastructure includes common pins and connections that can be configured for different debug modes, eliminating the need for separate debug infrastructures for each function.
Solution Approach 2:
The patent merges previously separate debug infrastructures into a single shared infrastructure. By combining independent and dependent debug capabilities, power management functions, and trace operations into one unified system with common pins and connections, the patent reduces overall complexity while maintaining all required functionality.
2Productivity
If die-to-die connections are used for debug operations, then multi-die debugging is enabled, but connection limitations and scheduling challenges increase
Solution Approach 1:
The patent segments the debug infrastructure into modular components that can be independently configured for different dies. Each die can have its own debug configuration while sharing common infrastructure elements, allowing flexible scheduling and connection management across multiple dies without overwhelming complexity.
Data Source
AI summary
On-die debug techniques for multi-die processors. One embodiment of a processor package comprises: a plurality of dies, each die comprising a plurality of functional circuit blocks; a plurality of inter-die interconnects to interconnect the plurality of dies; a debug subsystem comprising on-die debug circuitry integrated across the plurality of dies, a different instance of the on-die debug circuitry integrated on each die of the plurality of dies, each instance including a corresponding portion of a debug trace fabric and a corresponding plurality of buffers to aggregate trace data; wherein each instance of the on-die debug circuitry is configurable to operate in either an intra-die mode or an inter-die mode, the intra-die mode to collect debug data associated with intra-die trace operations performed independently on a corresponding die, and the inter-die mode to collect second debug data associated with inter-die trace operations performed across multiple dies of the plurality of dies.