Unified Translation Table for Storage Class Memory
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Solution Overview
Problem
Hierarchical data storage systems face inefficiencies in managing mapping information between logical and physical addresses, particularly in server computers using storage class memory (SCM) devices, where large storage space is required to maintain translation tables, and separate tables for physical and additional indicators lead to underutilization of memory space.
Innovation Solution
A single 64-bit table is used to overlay two data structures, with 48 bits allocated for physical addresses, lock, and eviction hints, and 16 bits for dirty indicators, allowing efficient use of memory space by accessing different portions of the translation table using different indexing schemes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate tables are used for physical addresses and additional indicators, then data management operations can be performed, but memory space is underutilized and storage efficiency decreases
Solution Approach 1:
The patent combines physical address storage and additional indicators (such as dirty indicators, lock indicators, eviction hints) into a single unified translation table structure. This merging eliminates the need for separate tables, fully utilizes memory space by storing all necessary data in one contiguous structure, and maintains all data management operations including wear leveling, caching, and address translation functionality
Solution Approach 2:
The unified translation table structure serves multiple functions simultaneously: it stores physical addresses for address translation, maintains additional indicators for data management operations, and enables wear leveling and caching operations. This multi-functional design replaces multiple specialized tables with a single versatile data structure that accomplishes all required operations
2Reliability
If large storage space is allocated for translation tables, then mapping information between logical and physical addresses can be maintained, but storage efficiency decreases
Solution Approach 1:
The patent merges the translation table with additional metadata structures into a single unified data structure. By combining physical address mappings with associated indicators (dirty indicators, lock indicators, eviction hints) in one contiguous memory structure, the system eliminates redundant storage overhead and achieves full utilization of allocated memory space while maintaining complete address mapping capability
3Ease of operation
If multiple separate tables are used for different data portions, then data access can be performed, but device complexity increases
Solution Approach 1:
The patent consolidates multiple separate tables (physical address table, dirty indicator table, lock indicator table, eviction hint table) into a single unified translation table. This merging reduces the number of data structures that need to be managed, simplified memory allocation and initialization, and decreases the complexity of maintaining multiple synchronized structures while preserving all data access capabilities through a single unified interface
Data Source
AI summary
A contiguous region in memory may be configured to store data so that a first portion of the data is addressable using a first indexing scheme and a second portion of the data is addressable using a second indexing scheme. The first portion of the data may include information which may be used by one entity and the second portion of the data may include different information which may be used by another entity.