Unified Virtual Memory Space for Embedded Firmware Simulation

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Solution Overview

Problem

Existing simulation technologies, such as QEMU and UML, use separate virtual memory address spaces for different software components and hardware, leading to complex memory management and access issues.

Innovation Solution

Establishing a single contiguous virtual memory space in a simulation computing system that includes a Firmware (FW) module, a HW simulation model, and a kernel bridge library, allowing these components to communicate directly and simplify memory access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate virtual memory address spaces are used for different software components and hardware (as in QEMU and UML), then isolation and security between components are improved, but memory access complexity and management difficulty increase

Engineering Contradiction:
Improvecomponent isolationVSAvoidmemory management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple separate virtual memory address spaces into a single unified virtual memory address space that accommodates firmware workloads, hardware simulation models, and kernel bridge libraries. This consolidation eliminates the need for complex address translation between multiple spaces while maintaining proper isolation through careful memory region management and mapping strategies.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If multiple virtual memory address spaces are used for simulation components, then hardware abstraction and simulation accuracy are improved, but debugging and testing difficulty increase

Engineering Contradiction:
Improvesimulation accuracyVSAvoiddebugging difficulty
Core Design Contradiction:
Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

The patent introduces a kernel bridge library as an intermediary component that operates within the unified virtual memory address space. This bridge library facilitates communication between hardware simulation models and the host kernel, enabling accurate hardware abstraction while maintaining simple memory access paths that are easier to debug and trace compared to multiple isolated address spaces.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If separate address spaces are used for firmware and hardware components, then system security and stability are improved, but IOMMU access complexity and performance overhead increase

Engineering Contradiction:
Improvesystem stabilityVSAvoidIOMMU access complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a universal virtual memory address space that serves multiple functions simultaneously: it accommodates firmware workloads, hardware simulation models, kernel bridge libraries, and IOMMU operations. This multi-functional design eliminates the need for separate address spaces for each component type, simplifying IOMMU access while maintaining system stability through proper memory region management and protection mechanisms.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250199835A1Simulating multi-core embedded system firmware with flat address space
Publication Date: 2025.06.19 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20250199835A1 patent drawing
  • US20250199835A1 patent drawing
  • US20250199835A1 patent drawing

AI summary

Embodiments herein describe using a contiguous virtual memory address space to contain each component used to simulate firmware. That is, rather than using multiple virtual memory spaces, the embodiments herein use a contiguous virtual memory space to contain the software components in the simulation or emulation. This approach simplifies memory access and management regarding the different processes and hardware components. This also enables input output MMU (IOMMU) access from anywhere in the simulation system, thread local storage (TLS) for range isolation, and simplifies debugging and testing of firmware and other processes.