Bump Pad Array Structure for Uniform Die and Ground Bump Formation
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Solution Overview
Problem
The existing manufacturing processes for semiconductor devices require separate and complex steps for forming die bumps and ground bumps, leading to increased costs and the risk of defects due to differences in height and width, which can result in voids and improper alignment of shielding layers.
Innovation Solution
A bump pad array is formed on a substrate using a single process with bumps of uniform height and width for both die and ground connections, allowing simultaneous formation of both types of bumps with the same equipment and stencil, simplifying the manufacturing process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate bumping processes are used for die bumps and ground bumps, then proper ground connection and shielding are achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent combines the formation of die bumps and ground bumps into a single simultaneous bumping process. The stencil is designed with openings for both die bump locations and ground bump locations, allowing both types of bumps to be formed in one step using the same bumping equipment and materials, thereby reducing manufacturing complexity while maintaining proper ground connection reliability
Solution Approach 2:
The stencil serves multiple functions: it defines both die bump locations and ground bump locations, and it controls the formation of both types of bumps simultaneously. This universal tool eliminates the need for separate stencils and separate bumping processes, reducing both device complexity and manufacturing steps while ensuring reliable electrical connections
2Reliability
If different sized bumps are formed for die and ground connections, then proper electrical connection is achieved, but voids and misalignment occur
Solution Approach 1:
The stencil incorporates locally differentiated openings: larger openings at die bump locations accommodate larger die bumps, while smaller openings at ground bump locations accommodate smaller ground bumps. This local variation in opening size allows each bump type to form with its optimal dimensions while maintaining precise alignment and preventing voids, thus achieving both proper electrical connection and manufacturing precision
3Ease of manufacture
If multiple bumping steps are used, then both die bumps and ground bumps are formed, but manufacturing cost and defect risk increase
Solution Approach 1:
The patent merges multiple bumping steps into a single simultaneous bumping operation. By designing the stencil with both die bump openings and ground bump openings, the process forms all required bumps in one step, eliminating redundant manufacturing steps, reducing cost, and improving productivity by preventing defects that could arise from multiple sequential operations
Data Source
AI summary
A semiconductor device has a substrate and plurality of first bumps formed over the substrate in an array. An array of second bumps is formed over the substrate on at least two sides of the first bumps. An electrical component is disposed over the first bumps. A package structure is disposed over the substrate and electrical component. The package structure has a horizontal member and legs extending from the horizontal member to form a cavity. The package structure is coupled to the array of second bumps. The package structure includes a material to operate as a heat sink or shielding layer. The shielding layer makes ground connection through the array of second bumps. The first bumps and second bumps have a similar height and width to form in the same manufacturing step. A protective layer, such as conductive epoxy, is disposed over the array of second bumps.