Uniform Data Pre-fetching for Graphics Memory Latency Reduction

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Solution Overview

Problem

In graphics operations, memory latency caused by fetching uniform data can lead to stalls and performance degradation, especially in systems with insufficient threads or cache to hide latency.

Innovation Solution

Implementing techniques to pre-fetch uniform data from memory on a per-draw or per-batch basis and storing it for minimal latency access within higher frequency graphics programs, using either shader-based gathering or draw shaders to optimize data transfer into the General Register File (GRF).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If uniform data is fetched from memory during graphics program execution, then the graphics programs can access necessary data, but memory latency causes stalls and performance degradation

Engineering Contradiction:
Improvedata access reliabilityVSAvoidgraphics operation performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent pre-fetches uniform data from memory into a cache before graphics program execution begins. This preliminary action ensures that when the graphics programs need to access uniform data, the data is already available in the cache, eliminating memory latency stalls and maintaining high graphics operation performance.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If thread switching and caches are used to hide memory latency, then some latency can be masked, but insufficient threads or cache capacity lead to performance degradation

Engineering Contradiction:
Improvememory latencyVSAvoidgraphics operation performance
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent implements a dedicated cache specifically for uniform data, separate from other cache structures. This local quality approach ensures that uniform data has its own specialized storage space, guaranteeing that graphics programs can access uniform data without being constrained by general cache capacity limitations or thread switching requirements.

Inventive Principle:
Principle #3Local quality

3Loss of time

If a large number of threads are used to hide memory latency, then latency can be masked, but the system complexity and resource requirements increase

Engineering Contradiction:
Improvememory latencyVSAvoidthread management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent extracts the uniform data caching function from the general thread execution mechanism and implements it as a separate, dedicated cache structure. This extraction eliminates the need to rely on thread switching to hide uniform data access latency, simplifying the system by decoupling uniform data access from thread management complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10552934B2Reducing memory latency in graphics operations
Publication Date: 2020.02.04 INTEL CORP
  • US10552934B2 patent drawing
  • US10552934B2 patent drawing
  • US10552934B2 patent drawing

AI summary

Methods and apparatus relating to reducing memory latency in graphics operations are described. In an embodiment, uniform data is transferred from a buffer to a General Register File (GRF) of a processor based at least in part on information stored in a gather table. The uniform data comprises data that is uniform across a plurality of primitives in a graphics operation. Other embodiments are also disclosed and claimed.