Uniform Silicide on 3D Transistor Source and Drain Regions
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Solution Overview
Problem
In three-dimensional field-effect transistors, the non-uniform silicide formation on epitaxial source and drain regions due to uneven metal deposition leads to increased external resistance and non-uniform behavior, as metal sputtering fails to cover overhangs and downwardly facing facets, resulting in charge pockets that prevent all parts of the tri-gate transistor from turning on simultaneously.
Innovation Solution
The use of atomic layer deposition (ALD) for conformal metal deposition on all epitaxial surfaces, specifically employing a nickel precursor with molecular hydrogen to achieve uniform nickel deposition, ensuring a uniform silicide layer over the entire source and drain regions, including overhangs and vertical surfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If metal sputtering is used for silicide formation, then the process is simple and fast, but the metal deposition is non-uniform on overhangs and downwardly facing facets
Solution Approach 1:
The patent replaces the physical vapor deposition (sputtering) method with a chemical vapor deposition (CVD) method. The CVD process uses gaseous precursors that chemically react to deposit metal conformally on all surfaces including overhangs and downwardly facing facets, substituting a mechanical/physical process with a chemical one to achieve uniform coverage.
Solution Approach 2:
The patent introduces a gaseous phase dimension by using vapor-phase precursors that can access and deposit on all surfaces including those not visible from the deposition direction. This dimensional change allows conformal coverage of complex 3D structures that cannot be achieved with line-of-sight sputtering methods.
2Reliability
If epitaxial growth is used to re-grow semiconductor material on source and drain regions, then external resistance is reduced, but non-uniform silicide formation occurs on the epitaxial surfaces
Solution Approach 1:
The patent replaces sputtering with CVD to ensure uniform metal deposition on the epitaxial source and drain surfaces. The chemical vapor deposition process provides conformal coverage that maintains the low resistance benefits of the epitaxial growth while achieving uniform silicide formation across all surfaces.
Solution Approach 2:
The patent changes the deposition parameters by switching from physical vapor deposition to chemical vapor deposition. This parameter change in the deposition method enables conformal metal layer formation on the epitaxial surfaces, ensuring uniform silicide properties while maintaining the electrical benefits of the epitaxial structure.
3Ease of manufacture
If non-uniform silicide layer is formed, then fabrication is simpler, but charge pockets form that prevent simultaneous activation of transistor parts
Solution Approach 1:
The patent replaces sputtering with CVD to eliminate the non-uniform deposition that causes charge pockets. The chemical vapor deposition method inherently provides conformal coverage, ensuring uniform silicide thickness and properties, which prevents charge pocket formation and enables simultaneous transistor activation.
Solution Approach 2:
The patent achieves homogeneous metal deposition by using CVD methodology. The gaseous precursors distribute uniformly and react conformally on all surfaces, creating a homogeneous metal layer that leads to uniform silicide formation. This homogeneity prevents localized charge pockets and ensures uniform electrical characteristics across the transistor structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a uniform silicide layer across the epitaxially grown source and drain regions, reducing external resistance and ensuring simultaneous activation of all parts of the tri-gate transistor, thereby improving performance and reliability.
Implementation Method 1
The use of atomic layer deposition (ALD) for conformal metal deposition on all epitaxial surfaces
Implementation Method 2
epitaxial growth is used to re-grow a semiconductor material on the source and drain regions
Implementation Method 3
a silicide is formed from a metal such as titanium, tungsten, nickel, cobalt or other metal on the exposed semiconductor material
Data Source
AI summary
A method for fabricating a three-dimensional transistor is described. Atomic Layer Deposition of nickel, in one embodiment, is used to form a uniform silicide on all epitaxially grown source and drain regions, including those facing downwardly.