Unipolar Logic Circuit With Capacitive Bootstrapping for Full-Swing Output

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Solution Overview

Problem

Existing logic circuits using unipolar transistors face issues with steady-state current flow, where the output terminal potential does not reliably reach the high or low power supply levels due to insufficient gate voltage, especially when a capacitive load is connected.

Innovation Solution

A semiconductor device configuration using multiple n-channel transistors and capacitors is employed, where specific connections between transistors and capacitors ensure that the output terminal potential reaches the high or low power supply levels by managing signal inputs and gate voltages effectively, preventing shoot-through current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a unipolar transistor logic circuit is used to reduce manufacturing complexity, then device complexity is reduced, but steady-state current flows and output potential does not reach supply levels

Engineering Contradiction:
Improvetransistor configurationVSAvoidoutput potential level
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The circuit is segmented into multiple unipolar transistors (first through fourth transistors) with specific series and parallel connections. The first and second transistors are connected in series between high and low power supply potentials, while the third and fourth transistors form another series path. This segmentation allows the circuit to achieve proper voltage levels without requiring complementary transistors.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Capacitors are introduced as intermediary elements to couple signals between transistor gates and sources. The first capacitor couples the first transistor's gate to its source, and the second capacitor couples the second transistor's gate to its source. These capacitive intermediaries enable proper gate voltage establishment without direct DC connections, resolving the voltage level issue.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of energy

If dual rail configuration with bootstrapping is used to prevent shoot-through current, then power efficiency is improved, but circuit complexity increases

Engineering Contradiction:
Improveshoot-through currentVSAvoidcircuit configuration
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent merges the dual rail configuration and bootstrapping techniques into a unified circuit architecture using only unipolar transistors. The series connection of first and second transistors between high and low power supply potentials, combined with capacitive bootstrapping, creates a integrated solution that achieves both shoot-through current prevention and simplified unipolar transistor usage.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The unipolar transistor-based circuit with capacitive bootstrapping serves multiple functions simultaneously: it acts as a logic gate, prevents shoot-through current, establishes proper voltage levels, and eliminates the need for complementary transistor pairs. This multi-functionality reduces overall device complexity while maintaining energy efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240364343A1Logic circuit formed using unipolar transistor, and semiconductor device
Publication Date: 2024.10.31 SEMICON ENERGY LAB CO LTD
  • US20240364343A1 patent drawing
  • US20240364343A1 patent drawing
  • US20240364343A1 patent drawing

AI summary

A semiconductor device using unipolar transistors, in which high and low levels are expressed using high and low power supply potentials, is provided. The semiconductor device includes four transistors, two capacitors, two wirings, two input terminals, and an output terminal. A source or a drain of the first transistor and a source or a drain of the fourth transistor are electrically connected to the first wiring. A gate of the fourth transistor is electrically connected to the first input terminal, and a gate of the second transistor is electrically connected to the second input terminal. A source or a drain of the second transistor and a source or a drain of the third transistor are electrically connected to the second wiring. The first transistor, the second transistor, and the two capacitors are electrically connected to the output terminal.