Unique ID Generation Circuit for Semiconductor Devices
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Solution Overview
Problem
The reliability of unique IDs generated using PUF technology in semiconductor devices is compromised due to variations in the initial threshold voltages of memory cells, leading to unstable data readout and increased error rates.
Innovation Solution
A semiconductor device and method that utilize a unique ID generation circuit to virtually offset the initial threshold voltages of memory cells, masking unstable cells and using only stable cells to generate the unique ID, thereby improving reliability by ensuring a minimum sensitivity threshold for data readout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If PUF technology is applied to generate unique ID using initial threshold voltage differences of memory cells, then device uniqueness is achieved, but reliability of the unique ID is reduced due to small voltage differences and unstable data readout
Solution Approach 1:
The patent applies preliminary offset to the initial threshold voltages of memory cells before generating the unique ID. By pre-adjusting the threshold voltages to compensate for manufacturing variations, the system ensures that the threshold voltage differences used for unique ID generation are above a predetermined threshold, thereby guaranteeing stable data readout and improving the reliability of the generated unique ID.
Solution Approach 2:
The patent changes the parameter of threshold voltage by applying an offset value to the initial threshold voltages of memory cells. This parameter adjustment ensures that the difference between threshold voltages of complementary memory cells meets a minimum threshold requirement, transforming cells with unstable small voltage differences into reliable unique ID generation elements.
2Productivity
If all memory cells are used for unique ID generation, then productivity is improved, but error rate increases due to inclusion of unstable cells with small threshold voltage differences
Solution Approach 1:
The patent applies local quality by treating memory cells differently based on their individual threshold voltage characteristics. Cells that meet the predetermined threshold voltage difference requirement after offset application are selected for unique ID generation, while cells that do not meet the requirement are excluded. This selective approach ensures high reliability of the generated unique ID while maintaining efficient use of qualifying memory cells.
3Reliability
If offset is applied to threshold voltages to ensure minimum sensitivity threshold, then data readout stability is improved, but device complexity increases due to additional offset circuitry and control mechanisms
Solution Approach 1:
The patent implements self-service by having the offset circuit automatically adjust the threshold voltages of memory cells based on their initial characteristics. The system autonomously applies the predetermined offset value to ensure threshold voltage differences meet the minimum requirement, eliminating the need for manual calibration or complex external adjustment mechanisms, thereby improving data readout stability without proportionally increasing device complexity.
Data Source
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Figure 3A~3C
AI summary
A semiconductor device according to one embodiment includes a unique ID generation circuit configured to generate a unique ID using a memory array including a plurality of complementary cells, each of the complementary cells includes first and second memory cells MC1 and MC2. The unique ID generation circuit uses, when data in the complementary cell read out in a first state in which an initial threshold voltage of the first memory cell MC1 has been virtually offset and data in the complementary cell read out in a second state in which an initial threshold voltage of the second memory cell MC2 has been virtually offset coincide with each other, the data in the complementary cell as the unique ID.