Unit Controller FPGA Firmware Recovery on Boot
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Solution Overview
Problem
Existing systems face challenges in verifying and recovering changeable firmware of Field-Programmable Gate Arrays (FPGAs) due to the need for pre-stored software copies and inability to handle hardware changes, leading to increased development costs and limited customization.
Innovation Solution
An information processing apparatus with a unit controller comprising a first and second sub-system, where the first sub-system overwrites the second sub-system's program with a recovery program when communication fails, and acquires configuration data from a server to update the firmware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a fixed configuration system with a common controller is used, then cost reduction by mass production is expected, but it is difficult to customize the system and development cost increases
Solution Approach 1:
The controller transitions from a static fixed configuration to a dynamic variable configuration system using FPGA technology. The FPGA allows the controller to be reprogrammed and reconfigured in the field to accommodate different peripheral devices and customization requirements, while maintaining a common hardware platform for mass production benefits.
Solution Approach 2:
The common controller is designed with universal FPGA-based architecture that can perform multiple functions by loading different configuration programs. This single controller can adapt to various peripheral devices and system requirements, eliminating the need for multiple specialized controllers while enabling customization.
2Adaptability or versatility
If a variable configuration system with FPGA is used, then customization is easy and development cost decreases, but verification and recovery of changeable firmware becomes challenging
Solution Approach 1:
The system performs preliminary verification of the FPGA configuration program during the boot process before full system operation. A verification program checks the integrity and correctness of the loaded configuration, and recovery mechanisms are prepared in advance to handle verification failures, preventing system instability.
Solution Approach 2:
The verification mechanism uses a copy of the configuration program stored in a separate memory area to compare against the loaded FPGA configuration. This allows verification of the changeable firmware without interfering with the running system, ensuring reliability while maintaining customization capability.
3Reliability
If firmware verification and recovery mechanisms are implemented, then system reliability improves, but device complexity increases
Solution Approach 1:
The verification and recovery functions are merged into the existing FPGA controller architecture rather than adding separate dedicated hardware. The verification program and recovery mechanisms are implemented as software/firmware components within the FPGA, utilizing the same processing resources and memory structures already present in the variable configuration system.
Data Source
AI summary
An information processing apparatus includes one or more units, wherein the one or more units include a unit controller, the unit controller includes a first sub-system and a second sub-system, and in a case where the first sub-system cannot communicate with the second sub-system when the information processing apparatus is booted, the first sub-system overwrites, with a recovery program, a program of the second sub-system stored in a memory in which the program of the second sub-system is stored.