Universal Correlator Architecture for GPS Multipath Mitigation
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Solution Overview
Problem
Conventional GPS receivers face challenges in accurately synchronizing with satellite signals due to multipath signal distortion, requiring re-design of hardware for different correlation and multipath mitigation techniques, and needing multiple sets of correlators for tracking and re-acquisition.
Innovation Solution
A receiver utilizing an array of complex accumulation registers to perform various correlation and multipath mitigation techniques, allowing adjustable delay spacing and eliminating the need for conventional parallel correlator hardware, by enabling separate accumulation registers for in-phase and quadrature phase measurements and adjusting bin sizes for precise correlation discrimination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional parallel correlator hardware is used for different correlation and multipath mitigation techniques, then each technique requires dedicated hardware design, but this increases device complexity and reduces adaptability
Solution Approach 1:
The patent implements a universal correlator architecture using a single array of complex accumulation registers that can perform multiple correlation techniques (narrow correlators, blanked correlation, multiple early-late spacings) and multipath mitigation schemes through software configuration rather than dedicated hardware for each technique. This multi-functional approach resolves the contradiction by enabling adaptability across different techniques while maintaining consistent hardware complexity.
Solution Approach 2:
The system employs dynamically configurable accumulation registers that can be selectively enabled and configured for different correlation techniques and delay spacings. The ability to reconfigure the same hardware resources dynamically for different operations allows the system to adapt to various techniques without requiring separate dedicated hardware, thereby resolving the contradiction between adaptability and hardware complexity.
2Measurement precision
If multiple sets of correlators are used for tracking and re-acquisition, then tracking accuracy is improved, but hardware complexity increases
Solution Approach 1:
The patent uses a single array of accumulation registers that can be dynamically reconfigured to serve multiple purposes: narrow correlator tracking, wide correlator re-acquisition, and intermediate spacings. By time-multiplexing and reconfiguring the same hardware resources, the system achieves multiple sets of correlator functionality without physically implementing multiple separate correlator hardware sets, thus improving measurement precision while controlling hardware complexity.
Solution Approach 2:
The invention merges the functionality of multiple separate correlator sets into a single unified array of complex accumulation registers. This consolidation allows tracking and re-acquisition functions to share the same hardware resources, reducing the total quantity of correlator hardware while maintaining the precision benefits of having multiple correlation measurements available through selective configuration.
3Measurement precision
If narrow correlators are used to reduce multipath effects, then measurement precision is improved, but the system lacks flexibility for other correlation techniques
Solution Approach 1:
The patent implements a universal correlator system where a single array of complex accumulation registers can be configured to perform narrow correlator measurements for multipath mitigation, as well as blanked correlation, multiple early-late spacings, and other techniques. This multi-functional capability resolves the contradiction by providing narrow correlator precision when needed while maintaining flexibility to switch to other correlation techniques through software configuration without hardware changes.
Data Source
AI summary
A receiver utilizes an array of complex accumulation registers to form an image of the average chip shape or, as appropriate, chip edge shape, of the received signal over a specified period of time as a time series of complex power measurements. The receiver divides the length of the chip into a plurality of ranges, or bins, and, as appropriate, extends the bins to cover additional chips or portions thereof. When a sample is taken, the receiver enables the respective registers that are associated with the corresponding bin or bins, and the respective registers then accumulates the associated power measurement. The receiver uses the accumulated measurements from selected registers and/or selected groups of registers, to produce the correlation values that are needed to perform one or more correlation techniques and/or one or more multipath mitigation techniques. As appropriate, the sizes and/or starting points of the bins, and/or the selections of the bins for the various groupings may be altered, to change the spacings, locations, and so forth to which correlation values correspond.