Universal Memory Controller with Programmable State Machine

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Solution Overview

Problem

Conventional Multi-Port Memory Controllers (MPMCs) have fixed architectures and port implementations, leading to performance degradation due to serial bus arbitration and limited compatibility with various memory devices and system topologies, which restricts the utilization of full bandwidth potential.

Innovation Solution

A universal memory controller with a self-aligning programmable state machine and configurable Port Interface Modules (PIMs) that allow dynamic adaptation to different memory devices and system organizations, enabling flexible port configurations and efficient use of resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a conventional memory controller with fixed architecture is used, then the device complexity is reduced, but the adaptability to different memory devices and system topologies deteriorates

Engineering Contradiction:
Improveadaptability to different memory devices and system topologiesVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory controller employs a programmable state machine that can be dynamically configured through a configuration interface to adapt to different memory device types and system topologies. This allows the controller to change its operational characteristics based on the specific application requirements, resolving the contradiction between fixed architecture simplicity and adaptability needs.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The controller modifies its operational parameters through programmable configuration, allowing it to adapt to various memory devices and system organizations. By changing parameters such as timing sequences, address mapping, and control signals, the controller achieves versatility without requiring multiple fixed-architecture devices.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If serial bus arbitration is used in conventional MPMCs, then the device complexity is reduced, but the bandwidth utilization deteriorates

Engineering Contradiction:
Improvebandwidth utilizationVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The arbitration mechanism is implemented as a programmable state machine that can dynamically select between different arbitration strategies. This allows the system to optimize bandwidth utilization by choosing appropriate arbitration methods based on traffic patterns and performance requirements, rather than being constrained to a single fixed arbitration approach.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The controller performs preliminary configuration of arbitration parameters and timing sequences before actual memory operations begin. This pre-programming of arbitration behavior allows the system to achieve high bandwidth utilization without the complexity of real-time dynamic arbitration logic.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If a universal memory controller with programmable state machine is used, then the adaptability improves, but the device complexity increases

Engineering Contradiction:
Improvecompatibility with various memory devicesVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The programmable state machine is designed to be self-configuring through a configuration interface that loads appropriate control sequences and parameters. This self-service capability reduces the need for complex external configuration hardware, as the controller automatically adapts to different memory devices through programmatic configuration rather than hardware switching.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The controller implements a universal architecture where a single programmable state machine can serve multiple memory device types and system configurations. This multi-functionality is achieved through configuration data that defines the specific operational characteristics for each supported memory type, allowing one device to replace multiple specialized controllers.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7720636B1Performance monitors (PMs) for measuring performance in a system and providing a record of transactions performed
Publication Date: 2010.05.18 XILINX INC
  • US7720636B1 patent drawing
  • US7720636B1 patent drawing
  • US7720636B1 patent drawing

AI summary

Performance monitors (PMs) are provided in a system to identify the execution time for data being transferred within the system and determine operation parameters of the system based on the rate data is transferred. The operation parameters are then used to configure hardware within the system. The PMs can provide a histogram of the transactions usable to evaluate system performance. The PMs can provide a time line diagram of the transactions to show the specific order the transactions occurred. The PMs can be provided in a multi-port memory controller (MPMC) to monitor the speed of read and write transactions from the MPMC ports, and used to configure logic within the MPMC to maximize the rate of data flow.