Universal Nonvolatile Memory Boot Mode Controller
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Solution Overview
Problem
Existing computing devices require separate memory controllers for volatile and nonvolatile memory, necessitating complex configuration processes that are not flexible enough to accommodate various types and configurations of nonvolatile memory, leading to instability during boot-up and potential data loss.
Innovation Solution
A single memory controller uses a shared bus to communicate with both volatile and nonvolatile memory, employing a universal boot mode protocol that allows it to configure itself by executing boot code from nonvolatile memory without prior knowledge of the specific nonvolatile memory type, ensuring stable operation across different configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate memory controllers are used for volatile and nonvolatile memory, then each memory type can be controlled independently, but the configuration process becomes complex and不够 flexible to accommodate various nonvolatile memory types
Solution Approach 1:
The patent combines the control of volatile memory and nonvolatile memory into a single memory controller. This unified controller executes boot code from nonvolatile memory to automatically configure itself, eliminating the need for separate controllers and complex manual configuration processes while maintaining reliable control over both memory types.
Solution Approach 2:
The memory controller is designed with universal boot mode capabilities that enable it to automatically adapt to various types of nonvolatile memory (flash, EEPROM, serial EEPROM, etc.). The controller executes boot code that identifies and configures itself for the specific nonvolatile memory type present, providing multi-functionality without requiring type-specific controller designs.
2Ease of operation
If the volatile memory controller is configured by executing instructions from nonvolatile memory, then the configuration becomes automated, but the process becomes unstable when dealing with different nonvolatile memory configurations
Solution Approach 1:
The patent implements a preliminary boot mode operation where the memory controller first executes boot code from nonvolatile memory to automatically determine the specific nonvolatile memory type and configure itself accordingly before entering normal operation mode. This preliminary configuration step ensures stability by properly adapting to the specific memory configuration before full system operation begins.
Solution Approach 2:
The memory controller dynamically changes its operational parameters based on the detected nonvolatile memory type. The boot code identifies the specific nonvolatile memory configuration and adjusts controller parameters accordingly, enabling stable operation across different memory types while maintaining automated configuration.
3Device complexity
If a single memory controller controls both volatile and nonvolatile memory through a shared bus, then device complexity is reduced, but the boot process must handle various memory configurations without prior knowledge
Solution Approach 1:
The memory controller performs self-configuration by automatically executing boot code from the connected nonvolatile memory device. The controller identifies the nonvolatile memory type and configures itself without external intervention or prior knowledge of the specific memory configuration, enabling a single controller to universally handle various memory types through self-service adaptation.
Data Source
AI summary
In accordance with a universal nonvolatile memory boot mode, one or more portions of boot code are obtained from a nonvolatile memory component. These one or more portions are obtained without knowing a row size used by the nonvolatile memory component, a column address strobe (CAS) latency used by the nonvolatile memory component, or a default burst length used by the nonvolatile memory component. The one or more portions of boot code are executed to configure the system to access a volatile memory component, and/or to reconfigure the system to access the nonvolatile memory in a different mode of operation.