Universal Peripheral Controller Integrating PHY and MAC Interfaces

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Solution Overview

Problem

The existing computing system architecture is costly and not scalable due to the need for multiple bridge logic devices and redundant PHY interfaces for peripheral device communication, with the shared PCI bus limiting the number of devices that can be connected simultaneously.

Innovation Solution

An integrated universal peripheral controller that includes a bus interface, a switch for routing communications, and multiple controllers with PHY and MAC interfaces, utilizing the PCI-Express bus architecture to enable direct connection of peripheral devices and reduce redundant interfaces, thereby improving scalability and reducing complexity and cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple bridge logic devices and redundant PHY interfaces are used for peripheral device communication, then device compatibility and communication capability are improved, but system cost and complexity increase

Engineering Contradiction:
Improvedevice compatibilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple bridge logic devices and redundant PHY interfaces into a single South bridge device. This integration eliminates the need for separate bridge devices for different peripheral types (IDE, SATA, USB, PCI) and consolidates multiple PHY interfaces into one unified interface, thereby reducing system complexity while maintaining compatibility with various peripheral devices

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The South bridge device is designed with universal functionality to handle multiple types of peripheral communications through a single device. It provides a unified interface that can communicate with diverse peripheral devices (storage devices, USB devices, PCI devices) without requiring dedicated bridge logic for each device type, thus reducing redundancy while preserving adaptability

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If multiple PHY interfaces are implemented for different peripheral devices, then communication capability with various devices is improved, but system cost increases

Engineering Contradiction:
Improvecommunication capabilityVSAvoidsystem cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent merges multiple PHY interfaces (IDE PHY, SATA PHY, USB PHY, PCI PHY) into a single unified PHY interface within the South bridge device. This consolidation eliminates the need to manufacture and install multiple separate PHY interfaces, thereby reducing system cost while maintaining the capability to communicate with various peripheral devices through the single integrated interface

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If shared PCI bus architecture is used for peripheral device communication, then device compatibility is maintained, but scalability is limited as the number of devices increases

Engineering Contradiction:
Improvedevice compatibilityVSAvoidscalability
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments the shared PCI bus architecture into dedicated communication paths through the integrated South bridge device. Instead of multiple devices sharing a common bus where only one can communicate at a time, the South bridge provides direct communication paths to multiple peripherals, enabling simultaneous communications and improving scalability while maintaining PCI compatibility

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8856401B2Universal controller for peripheral devices in a computing system
Publication Date: 2014.10.07 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8856401B2 patent drawing
  • US8856401B2 patent drawing
  • US8856401B2 patent drawing

AI summary

An integrated controller is provided for controlling communications with a plurality of peripheral devices. The integrated controller includes a bus interface for processing communications with a processor; a switch for routing communications between the processor and one or more of the peripheral devices; and a plurality of controllers, where each of the controllers provide an interface to at least one peripheral device. The controllers include at least one PHY controller for a corresponding peripheral device that provides an electrical interface to a connection, such as a network connection. The controllers also include at least one MAC controller that stores and forwards packets to and from a network connection.