Universal PRN Code Generation for Multi-GNSS Receiver Compatibility

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current GNSS receivers are not compatible with multiple global navigation satellite systems, requiring separate code generators for different systems and increasing complexity in multi-frequency, multi-constellation receiver designs.

Innovation Solution

A universal PRN code generator that includes a register controller, digitally controlled oscillator, primary and secondary code generators, Weil, memory, and Golden code generators, along with multiplexers and XOR gates to produce PRN codes compatible with GPS, GLONASS, BeiDou, and Galileo systems, using a single FPGA or ASIC module.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate code generators are used for different satellite systems, then compatibility with multiple GNSS systems is improved, but device complexity increases

Engineering Contradiction:
Improvecompatibility with multiple GNSS systemsVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal PRN code generator that can generate pseudo-random noise codes for multiple GNSS systems (GPS, GLONASS, BeiDou, Galileo) using a single integrated device. The system uses configurable registers and control logic that can be programmed to produce different code sequences and formats required by various satellite navigation systems, eliminating the need for separate dedicated code generators for each system while maintaining full compatibility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs configurable parameters including code length, chip rate, and sequence generation algorithms that can be dynamically adjusted to match the specific requirements of different GNSS systems. By changing these parameters through register configuration rather than hardware redesign, the system achieves multi-system compatibility with a single device architecture, significantly reducing overall device complexity.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If multiple code generators are implemented, then support for multi-frequency and multi-constellation is improved, but the number of components increases

Engineering Contradiction:
Improvemulti-frequency and multi-constellation supportVSAvoidnumber of components
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent merges the functionality of multiple separate code generators into a single integrated PRN code generation unit. This unified generator uses shared hardware resources including common control logic, unified register files, and integrated output stages that can serve multiple frequency and constellation requirements simultaneously, thereby reducing the total number of components while maintaining comprehensive multi-frequency and multi-constellation support.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system implements dynamic configuration capabilities where the code generator can be reprogrammed in real-time to switch between different GNSS constellations and frequency bands. This dynamic adaptability allows a single component to replace multiple static code generators, as the system can change its behavior through software configuration rather than requiring separate hardware for each frequency or constellation combination.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10735123B2Universal pseudorandom noise code generator
Publication Date: 2020.08.04 HONEYWELL INTERNATIONAL INC
  • US10735123B2 patent drawing
  • US10735123B2 patent drawing
  • US10735123B2 patent drawing

AI summary

A pseudo-random noise (PRN) code generator is provided. The PRN code generator includes a register controller; a digitally controlled oscillator (DCO); a primary code generator configured to generate a primary code chip; and a secondary code generator configured to generate a secondary code chip. The primary code generator and the secondary code generator each include: a Weil code generator configured to generate a Weil code chip; a memory code generator configured to generate a memory code chip; a Golden code generator configured to generate a Golden code chip; and a first multiplexer configured to select the Weil code chip, the Golden code chip, or the memory code chip as the primary code chip or the secondary code chip. The PRN code generator also includes a first XOR gate configured to XOR the primary code chip and the secondary code chip to generate a PRN code chip.