Universal Tuning Module With Switched PLL Clock Distribution
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Solution Overview
Problem
Traditional digital television receiving systems face complexity and interference due to the need for separate tuners and circuits to process different television signals, which complicates the passing of clock signals to hybrid and satellite tuners.
Innovation Solution
A universal tuning module that includes an oscillator, phase-lock-loop (PLL) circuit, and switches to selectively pass a clock signal to either a hybrid tuner or a satellite tuner, allowing for integrated circuit implementation and reduced interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate tuners are used for hybrid and satellite signals, then signal processing capability is improved, but circuit complexity increases
Solution Approach 1:
The patent implements a universal tuner that can process both hybrid television signals and satellite television signals through a single integrated circuit. The tuner includes signal input terminals for both hybrid and satellite signals, and a switching circuit that can selectively connect to either signal source. This multi-functional design eliminates the need for separate dedicated tuners while maintaining full signal processing capability for both hybrid and satellite broadcasts.
2Adaptability or versatility
If separate tuners are used for hybrid and satellite signals, then signal processing capability is improved, but interference between circuits increases
Solution Approach 1:
The patent introduces a switching circuit as an intermediary component that selectively connects the universal tuner to either hybrid or satellite signal inputs. This switching mechanism prevents direct interaction between the two signal paths, thereby eliminating interference between circuits. The switching circuit acts as a mediator that ensures only one signal type is processed at a time, avoiding the interference problems that would arise from having both signal paths active simultaneously.
3Device complexity
If integrated circuit implementation is used, then device complexity is reduced, but clock signal distribution becomes more challenging
Solution Approach 1:
The patent employs a switching circuit that also serves as a clock signal distributor. The switching circuit receives a single clock signal from the oscillator and selectively distributes it to the appropriate signal processing path based on the selected input mode (hybrid or satellite). This integrated approach to clock distribution through the switching circuit eliminates the complexity of implementing separate clock distribution networks for different signal paths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The universal tuning module simplifies the passing of clock signals and reduces interference by integrating the necessary components, enabling efficient processing of both television and satellite signals within a common integrated circuit, thus enhancing the digital television receiving system's functionality and reducing circuit complexity.
Implementation Method 1
a phase-lock-loop (PLL) circuit arranged upstream of the first and second switches and downstream of the oscillator, wherein the phase-lock-loop (PLL) circuit is configured to generate a clock signal with a frequency substantially equal to a multiple of that of the output of the oscillator or to generate a clock signal, based on the output of the oscillator, with any frequency that the first or second tuner needs
Data Source
AI summary
A universal tuning module may include an oscillator, a first tuner configured to process a first television signal, a second tuner configured to process a second television signal, a first switch configured to pass its input containing information associated with an output of the oscillator to said first tuner, and a second switch configured to pass its input containing information associated with the output of the oscillator to the second tuner.