Power Supply Network Visualization from UPF Files
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Solution Overview
Problem
The complexity of Unified Power Format (UPF) files in electronic design automation makes it difficult to understand and debug power supply networks, especially in large designs, due to verbose ASCII descriptions and lack of visualization tools for non-HDL code, leading to user errors and challenges in visualizing interactions between power supply networks and hardware description language (HDL) code.
Innovation Solution
A computer-implemented method for visualizing electronic circuit designs, including generating a schematic of the power supply network from UPF files, which can display power domains, switches, nets, and control signals, allowing for hierarchical representation and integration with additional display windows for simultaneous viewing before, during, or after simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If verbose ASCII file description is used for power supply network, then complete power intent specification is achieved, but understanding and debugging becomes difficult
Solution Approach 1:
The patent creates a graphical copy/representation of the power supply network from the ASCII UPF files. The visualization tool generates graphical schematics that replicate the power network structure, making it easier to understand and debug while preserving the complete power intent specification from the original verbose text files.
Solution Approach 2:
The patent transforms the one-dimensional text-based power supply network description into a two-dimensional graphical visualization. This dimensional change allows users to visually perceive the power network structure, connections, and relationships that are difficult to comprehend in text form, thereby improving debugging ease while maintaining specification completeness.
2Ease of operation
If hierarchical schematic is generated from UPF files, then power supply network visualization is improved, but processing complexity increases
Solution Approach 1:
The patent segments the complex UPF file processing into distinct functional modules: parsing the ASCII power supply network description, extracting power network elements and relationships, generating graphical representations, and rendering the hierarchical schematic. This segmentation reduces processing complexity by organizing the transformation process into manageable, independent stages while achieving improved visualization.
3Adaptability or versatility
If manual creation of power supply network files is performed, then flexibility in specification is achieved, but user errors increase
Solution Approach 1:
The patent implements self-service through automated validation and error detection mechanisms that check the power supply network specification during the graphical generation process. The system automatically identifies inconsistencies, missing elements, and potential errors in the UPF files, reducing the error rate while preserving the flexibility of manual specification through automated assistance rather than removing manual control.
Data Source
AI summary
Embodiments of the present disclosure may include receiving, at one or more computing devices, the electronic circuit design, wherein the electronic circuit design includes at least one Unified Power Format file. Embodiments may further include generating, using the one or more computing devices, a schematic of a power supply network, based upon, at least in part, the at least one Unified Power Format file, the schematic including one or more power supply network components.


