Upper Cover Temperature Control for Semiconductor Vapor Deposition

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Solution Overview

Problem

Existing methods for vapor deposition on semiconductor wafers require frequent cleaning of the process chamber due to incomplete prevention of process gas products depositing on chamber surfaces, affecting layer properties and necessitating frequent temperature control adjustments.

Innovation Solution

Measuring the temperature of the upper cover's center outer surface to control its temperature within an optimal range, correlating with process gas flow rates, and using this measurement to extend the interval between chamber cleanings by ensuring the temperature remains within the optimal range for deposition, thereby reducing contamination and extending the usable period before cleaning is necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the process chamber is cleaned frequently to remove deposits of process gas products, then the purity and quality of deposited layers is improved, but the productivity and operational continuity deteriorates due to frequent interruptions

Engineering Contradiction:
Improvelayer deposition qualityVSAvoidoperational continuity
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent changes the temperature parameter of the upper cover from uncontrolled or uniformly controlled to precisely controlled within a specific range (400-600°C). This parameter change prevents the deposition of process gas products on the upper cover surface, thereby maintaining layer deposition quality while reducing cleaning frequency and improving operational continuity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback control system where the temperature of the upper cover is continuously monitored and adjusted to maintain it within the optimal range. This feedback mechanism ensures that the upper cover temperature remains stable, preventing harmful deposits and reducing the need for frequent cleaning interruptions

Inventive Principle:
Principle #23Feedback

2Device complexity

If the temperature of the upper cover is not controlled, then the device complexity is reduced, but process gas products deposit on the upper cover requiring frequent cleaning

Engineering Contradiction:
Improvetemperature control systemVSAvoiddeposition on chamber surfaces
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a specific temperature parameter range (400-600°C) for the upper cover that fundamentally changes the chemical behavior of process gas products. At this temperature range, the process gas products do not deposit on the upper cover, eliminating the harmful deposition effect while adding only a moderate temperature control system

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent adds a new dimension of temperature control specifically for the upper cover, independent of the substrate temperature control. This separate dimensional control of the upper cover temperature prevents deposition without interfering with the deposition process on the substrate

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Duration of action of stationary object

If the upper cover temperature is controlled within an optimal range, then the interval between cleanings is extended, but the device complexity increases due to additional temperature control requirements

Engineering Contradiction:
Improveusable period before cleaningVSAvoidtemperature control system
Core Design Contradiction:
Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The patent establishes an optimal temperature range (400-600°C) for the upper cover that prevents deposition of process gas products. By maintaining this parameter within the specified range, the upper cover remains clean for extended periods, significantly extending the interval between cleanings

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The temperature control system for the upper cover serves multiple functions: it prevents deposition on the upper cover, maintains optimal conditions for layer deposition on the substrate, and extends the operational interval between cleanings. This multi-functionality justifies the added device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for longer intervals between process chamber cleanings, reducing the frequency of cleaning and maintaining the chamber's optimal temperature range, thus improving the consistency and duration of semiconductor wafer layer deposition.

Implementation Method 1

Upper and lower covers which are transmissive to thermal radiation and through which radiation energy is transmitted into the process chamber and onto the semiconductor wafer

Methodology Applied
Scientific EffectThermal radiation: Thermal Radiation

Implementation Method 2

The process gas is conducted over the face of the semiconductor wafer that is to be coated. Upon contact with the semiconductor wafer which has been heated to the deposition temperature, process gas is decomposed and the desired layer is deposited on the semiconductor wafer

Methodology Applied
Scientific EffectVapor deposition: Physical Vapour Deposition

Implementation Method 3

process gas is decomposed and the desired layer is deposited

Methodology Applied
Scientific EffectDecomposition: Pyrolysis

Implementation Method 4

cooling the process chamber by means of a cooling gas from outside and controlling the temperature of the walls by controlling the inflow of cooling gas

Methodology Applied
Scientific EffectCooling: Cooling

Data Source

PatentUS9018021B2Method and apparatus for depositing a layer on a semiconductor wafer by vapor deposition in a process chamber
Publication Date: 2015.04.28 SILTRONIC AG
  • US9018021B2 patent drawing
  • US9018021B2 patent drawing

AI summary

A layer is deposited onto a semiconductor wafer by CVD in a process chamber having upper and lower covers, wherein the wafer front side temperature is measured; the wafer is heated to deposition temperature; the temperature of the upper process chamber cover is controlled to a target temperature by measuring the temperature of the center of the outer surface of the upper cover as the value of a controlled variable of an upper cover temperature control loop; a gas flow rate of process gas for depositing the layer is set; and a layer is deposited on the heated wafer front side during control of the upper cover temperature to the target temperature. A process chamber suitable therefor has a sensor for measuring the upper cover outer surface center temperature and a controller for controlling this temperature to a predetermined value.