Transformerless 3-Phase UPS Multi-Level DC Bus Architecture
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Solution Overview
Problem
High-power uninterruptible power supplies (UPSs) face efficiency losses due to the use of 1200 V components to handle voltage overshoots, leading to increased conduction and switching losses, and require larger physical sizes and higher voltage ratings for IGBT modules.
Innovation Solution
A transformerless 3-phase UPS design with multiple DC buses and power converters that utilize boost circuits to manage AC power input efficiently, reducing the need for high-voltage components and minimizing losses, while also balancing voltages and compensating for unbalanced operations without a transformer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 1200 V components are used to handle voltage overshoots, then reliability is improved, but conduction losses and switching losses increase
Solution Approach 1:
The patent changes the voltage rating parameter of components from 1200V to lower voltages (e.g., 650V or 800V) by implementing a multi-level DC bus architecture that divides the voltage into multiple levels (±450V, ±150V). This parameter change reduces conduction and switching losses while maintaining reliability through distributed voltage management across multiple buses and converters.
2Reliability
If 1200 V components are used to handle voltage overshoots, then reliability is improved, but device size increases
Solution Approach 1:
The patent segments the single high-voltage DC bus into multiple lower-voltage DC buses (first positive DC bus, second positive DC bus, first negative DC bus, second negative DC bus). This segmentation allows the use of smaller, lower-voltage components instead of large 1200V components, reducing overall device volume while maintaining voltage overshoot handling capability through distributed architecture.
3Device complexity
If transformerless design is used, then device complexity is reduced, but voltage balancing becomes difficult
Solution Approach 1:
The patent implements feedback control mechanisms where each power converter monitors and adjusts its operation to maintain voltage balance across the multiple DC buses. The converters communicate voltage information and adjust their power flow accordingly, achieving stable voltage balancing without requiring a transformer through active feedback control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces physical size, increases efficiency, lowers component voltage ratings, decreases heat losses, and minimizes the need for flying capacitors and clamp diodes, while maintaining reliable 3-phase power delivery and reducing battery voltage requirements.
Implementation Method 1
a first power converter coupled to the input and configured to supply power from the multiphase AC power source to the plurality of DC buses during a first positive region of the sinusoidal waveform and a first negative region of the sinusoidal waveform
Data Source
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AI summary
According to one aspect, embodiments of the invention provide power converter circuitry including an input including a plurality of input lines each configured to be coupled to a phase of a multiphase AC power source having a sinusoidal waveform, a plurality of DC buses including a first positive DC bus having a first nominal DC voltage, a second positive DC bus having a second nominal DC voltage, a first negative DC bus having a third nominal DC voltage and a second negative DC bus having a fourth nominal DC voltage; a first power converter coupled to the input and configured to supply power from the multiphase AC power source to the plurality of DC buses during a first positive region of the sinusoidal waveform and a first negative region of the sinusoidal waveform; and a second power converter coupled to the input and configured to supply power from the multiphase AC power source to at least some of the plurality of DC buses during a second positive region of the sinusoidal waveform and a second negative region of the sinusoidal waveform.