Upsized Buried Power Rails for Low-Resistance Cell Scaling
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Solution Overview
Problem
The width limitations of buried power rails in integrated circuits lead to undesirable power loss and voltage variations, hindering efficient power distribution and cell density scaling.
Innovation Solution
The method involves etching beneath the component layers to create enlarged cavities for upsized buried power rails, allowing for increased width without altering the spacing between components, thereby reducing resistance and enhancing power supply efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the width of buried power rails is increased to reduce resistance, then power distribution efficiency improves, but the trench width required increases which conflicts with component spacing requirements
Solution Approach 1:
The patent transitions from planar power rail configuration to three-dimensional cavity-based configuration. By etching cavities beneath component layers and filling them with conductive material, the power rails extend vertically and horizontally, increasing effective width without occupying additional lateral space that would interfere with component spacing.
Solution Approach 2:
The power rails are nested within cavities that are themselves nested within the substrate structure beneath component layers. This nested configuration allows the power rails to be embedded in the substrate without occupying the same lateral space as the components above, effectively increasing power rail width while maintaining component density.
2Ease of manufacture
If conventional trenches are used for buried power rails, then manufacturing is simpler, but the power rail width is limited by trench opening width
Solution Approach 1:
The power distribution network is segmented into multiple independent cavity-filled power rails. Each cavity is formed and filled separately, allowing the width of each individual power rail to be optimized independently. The segmentation of the substrate into multiple cavities enables greater total power rail width while maintaining manufacturing feasibility through standardized cavity formation processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power rail resistance by up to 70%, improves power distribution, and increases cell density scaling, leading to better chip design and reduced voltage drop.
Implementation Method 1
removing material to enlarge the width of a portion of at least one of the trenches to form an enlarged cavity
Implementation Method 2
the etch process is a crystal etch. In some embodiments, the etch is performed using wet chemicals. In some such embodiments, the crystal etch is performed using potassium hydroxide
Implementation Method 3
depositing an oxide coating over a lining of the interior of the cavity. Some embodiments also comprise applying a conductive material into at least one of the cavities
Data Source
AI summary
An integrated circuit comprising a substrate. At least two component bearing structures are fabricated within a layer above the substrate. In addition, at least one vertical space is present separating adjacent component bearing structures. At least one upsized buried power rail is formed within a corresponding cavity contiguously formed adjacent to a corresponding one of vertical spaces. The upsized buried power rail has a width that is greater than the width of the vertical space.