Dynamic USB Bus Interface Switching for Power-Constrained Devices

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Solution Overview

Problem

Current USB interfaces impose current draw limitations when portable devices are connected to a host system, restricting the ability to recharge batteries and provide full functionality, especially for devices requiring more than 100 mA to operate at high speed USB modes.

Innovation Solution

A system and method that dynamically manage USB bus interfaces by initially establishing a full speed connection, using internal microprocessor resources efficiently, and upon battery charging, switch to high speed mode by re-establishing the connection with an external bus controller, allowing devices to draw the necessary current for full operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a device operates at high speed USB mode, then data transmission rate is improved, but current draw increases beyond USB limitations

Engineering Contradiction:
Improvedata transmission rateVSAvoidcurrent draw
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent dynamically switches between full speed and high speed USB modes based on battery charge level. During enumeration, the device operates in full speed mode to minimize current draw. After battery charging completes, the device re-enumerates and switches to high speed mode for full functionality, thus adapting the operating speed to current availability conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the USB transmission rate parameter from full speed (12 Mbps) to high speed (480 Mbps) based on power availability. This parameter change is triggered by the battery charge status, allowing the device to optimize data transmission rate according to the current power supply capacity.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If a device draws limited current during USB connection, then host system compatibility is improved, but battery recharging capability is restricted

Engineering Contradiction:
Improvehost system compatibilityVSAvoidbattery charge capacity
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent performs battery charging during the enumeration phase before the device needs full power operation. By charging the battery in advance when connected to the host system, the device ensures sufficient power is available before switching to high speed mode, thus resolving the conflict between limited current draw and battery recharging capability.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If a device uses internal microprocessor for USB communication, then device complexity is reduced, but transmission speed is limited to full speed

Engineering Contradiction:
Improvecontroller integrationVSAvoidUSB transmission rate
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent dynamically switches between using the internal microprocessor USB controller (for full speed operation) and an external USB controller (for high speed operation). During enumeration, the internal controller is used to maintain simplicity. After battery charging, the device switches to the external controller to achieve high speed transmission, thus adapting the controller configuration to speed requirements.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP1995666B1System and method for interfacing an electronic device with a host system
Publication Date: 2009.07.15 BLACKBERRY LTD
  • EP1995666B1 patent drawingFigure 1
  • EP1995666B1 patent drawingFigure 2
  • EP1995666B1 patent drawingFigure 3

AI summary

The invention relates to a system and method for controlling interfacing parameters for a device when connected to a host is provided. The method comprises: monitoring for an initial connection by the device to the host; then, while the device is establishing the connection with the host, utilizing a communication bus controller contained in a microprocessor in the device to process communications with the host at a first data transmission rate; and after a predetermined condition, re-establishing the connection with the host using a second bus controller in the device that processes the communications at a second transmission rate that is higher the first data transmission rate.