USB Clock Generation Using RC Oscillator Phase Synchronization

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Solution Overview

Problem

In universal serial bus (USB) systems, generating an accurate 12 MHz reference clock signal for synchronizing data signals is challenging due to the high cost and embedding difficulties of crystal oscillators, and the instability of inductor-capacitor (LC) oscillators within integrated circuits.

Innovation Solution

A signal generating apparatus and method using a first determining circuit, a second determining circuit, and a frequency generating circuit to detect data signals and determine transmitting modes, generating a 12 MHz clock signal using an RC oscillator, which adjusts frequency based on phase differences to achieve synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a crystal oscillator is used to generate the 12 MHz reference clock signal, then the accuracy of the reference clock signal is improved, but the cost and embedding difficulty increase

Engineering Contradiction:
Improveaccuracy of reference clock signalVSAvoidembedding difficulty
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent replaces the expensive crystal oscillator with a low-cost RC oscillator circuit that can be easily embedded in the USB device. The RC oscillator uses standard resistors and capacitors to generate the 12 MHz reference clock signal, eliminating the need for expensive crystal components while maintaining sufficient accuracy for USB synchronization requirements.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent adjusts the parameters of the RC oscillator circuit (resistor and capacitor values) to achieve the desired 12 MHz frequency output. By carefully selecting and tuning the RC time constant, the circuit generates an accurate reference clock signal without requiring expensive crystal components, thus resolving the contradiction between cost and accuracy.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If an LC oscillator is used to generate the 12 MHz reference clock signal, then the ease of embedding is improved, but the frequency control stability deteriorates

Engineering Contradiction:
Improveease of embeddingVSAvoidfrequency control stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent replaces the unstable LC oscillator with a more reliable RC oscillator circuit that can be easily embedded in the USB device. The RC oscillator uses standard resistors and capacitors to generate the 12 MHz reference clock signal, eliminating the need for expensive crystal components while maintaining sufficient accuracy for USB synchronization requirements.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent adjusts the parameters of the RC oscillator circuit (resistor and capacitor values) to achieve the desired 12 MHz frequency output. By carefully selecting and tuning the RC time constant, the circuit generates an accurate reference clock signal without requiring expensive crystal components, thus resolving the contradiction between cost and accuracy.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8806091B2Signal generating apparatus and signal generating method
Publication Date: 2014.08.12 SILICON MOTION INC
  • US8806091B2 patent drawing
  • US8806091B2 patent drawing
  • US8806091B2 patent drawing

AI summary

A signal generating apparatus, applicable in a universal serial bus (USB) device, includes: a first determining circuit for receiving a data signal to determine if the data signal is generated by the universal serial bus device, and generating a first determined result; a second determining circuit coupled to the first determining circuit for receiving the data signal and the first determined result to determine a transmitting mode corresponding to the data signal according to the first determined result, and generating a second determined result; and a frequency generating circuit coupled to the second determining circuit for generating a first clock signal utilized for synchronizing the data signal according to the second determined result.