USB Serial Bus Clock Calibration with Two-Stage Frequency Tuning
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Solution Overview
Problem
Conventional USB interface data transmission architectures face challenges with inaccurate frequency resolution and increased complexity and cost due to the use of external crystal oscillators and additional frequency signal sources for clock frequency calibration.
Innovation Solution
A serial bus clock frequency calibration system that employs two-stage clock frequency resolution calibrations, using a shared oscillator with a first frequency calibration device for coarse tuning based on the SOF signal and a second frequency calibration device for fine tuning based on the reference clock frequency, reducing system complexity and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an external crystal oscillator is used to generate clock frequency for USB device, then the clock frequency stability is improved, but the system cost and complexity increase
Solution Approach 1:
The patent combines the crystal oscillator and frequency synthesizer into an integrated frequency calibration device. The oscillator generates a raw clock signal that is directly fed into the synthesizer, eliminating the need for separate external components. This integration maintains frequency stability while reducing system complexity and cost.
Solution Approach 2:
The frequency calibration device performs multiple functions: it generates the clock signal, synthesizes the frequency, and calibrates the timing. This multi-functional approach replaces what would traditionally require separate external crystal oscillator and frequency synthesizer components, reducing overall system complexity while maintaining reliability.
2Measurement precision
If a frequency synthesizer with reference clock generating circuit is used to calibrate working frequency, then the frequency calibration capability is improved, but the device complexity and cost increase
Solution Approach 1:
The reference clock generating circuit and frequency synthesizer are merged into a single frequency calibration device. The same oscillator that generates the raw clock signal also serves as the reference for the synthesizer, eliminating redundant components and reducing circuit complexity while maintaining frequency calibration capability.
Solution Approach 2:
The frequency calibration device is designed to be multi-functional, serving both as a clock source and as a frequency reference for calibration. This universal design approach allows the system to achieve accurate frequency calibration without requiring separate dedicated circuits, thereby reducing overall device complexity.
3Productivity
If the micro-frame timer range is increased to accommodate more data transmission packets, then the bandwidth is improved, but the clock frequency resolution requirement increases
Solution Approach 1:
The frequency calibration device uses feedback from the USB host's timing signals to continuously adjust and calibrate the clock frequency. This feedback mechanism ensures high frequency resolution is maintained even as the system operates at higher bandwidths with extended micro-frame timer ranges, allowing the system to scale productivity without sacrificing measurement precision.
Data Source
AI summary
A serial bus clock frequency calibration system and a method thereof are disclosed herein. The system utilizes a first frequency calibration device and a second frequency calibration device both to share an oscillator as so to perform two-stage clock frequency resolution calibrations for generating different frequency-tuning ranges. This can bring an optimal frequency resolution and greatly reduce system complexity and save element cost.