Configurable Threshold DMA Engine for USB Data Transmission
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Solution Overview
Problem
Conventional USB systems face a trade-off between CPU utilization and memory buffering capacity due to the need for fixed thresholds in data transmission, which fails to achieve optimized performance in both aspects.
Innovation Solution
A data transmission circuit and method using a configurable threshold system, where a DMA engine starts fetching data from memory when it reaches a first threshold and continues until it reaches a second threshold greater than the first, optimizing CPU utilization and memory buffering capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of stationary object
If a lower threshold is configured in the memory, then the buffering capacity is improved, but the CPU utilization increases and loading becomes heavier
Solution Approach 1:
The patent segments the threshold into two distinct values: a first threshold for initiating DMA transmission and a second threshold for stopping transmission. This segmentation allows the system to maintain a lower first threshold for buffering capacity while using a higher second threshold to reduce CPU interrupts, thereby resolving the contradiction between buffering capacity and CPU utilization.
Solution Approach 2:
The patent introduces a DMA engine as an intermediary between the memory and USB controller. The DMA engine handles data transmission autonomously based on threshold conditions, reducing the need for CPU intervention. This intermediary mechanism allows the system to achieve both high buffering capacity (via lower first threshold) and low CPU utilization (via automated DMA operation).
2Productivity
If a higher threshold is configured in the memory, then the CPU utilization is reduced, but the buffering capacity becomes insufficient
Solution Approach 1:
The patent divides the threshold function into two segments: the first threshold triggers DMA transmission to reduce CPU load, while the second threshold (higher than the first) determines when transmission stops. This segmentation enables the system to maintain high buffering capacity by allowing data accumulation up to the second threshold while still reducing CPU utilization through automated DMA operation triggered at the lower first threshold.
Solution Approach 2:
The patent implements dynamic threshold management where the first and second thresholds can be configured differently based on system needs. The system dynamically adjusts transmission behavior based on these thresholds, allowing optimal balancing of buffering capacity and CPU utilization without requiring a fixed single threshold.
3Ease of manufacture
If a fixed threshold is used for data transmission, then the system is simple to implement, but it fails to achieve optimized CPU utilization and memory buffering capacity simultaneously
Solution Approach 1:
The patent segments the single fixed threshold into two configurable thresholds (first and second thresholds) with distinct functions. This segmentation enables optimized performance by allowing the first threshold to trigger DMA transmission for reduced CPU load, while the second threshold ensures adequate buffering capacity, achieving overall system optimization without excessive complexity.
Solution Approach 2:
The patent changes the parameter from a single fixed threshold to two configurable thresholds that can be adjusted based on system requirements. This parameter change allows flexible optimization of both CPU utilization and memory buffering capacity while maintaining relatively simple implementation through standard threshold comparison logic in the DMA engine.
Data Source
AI summary
A data transmission circuit applied to a universal serial bus (USB) system includes a memory, a direct memory access (DMA) engine and a USB controller. The memory is arranged for receiving and storing external data. The DMA engine is coupled to the memory, and arranged for controlling data retrieved from the memory. The USB controller is coupled to the DMA engine, and arranged for receiving data from the DMA engine and for transmitting the received data to a host. When the memory the stored data volume reaches a first threshold, the DMA engine starts continuously fetching data from the memory and transmitting it to the USB controller, until the data volume fetched by the DMA engine reaches a second threshold, or there is no data left in the memory. The second threshold is greater than the first threshold.


