USB Controller Automatic Clock Generation via PLLs

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Solution Overview

Problem

Traditional USB controllers require external crystal oscillation or internal oscillator calibration to synchronize device and host clocks for real-time data transmission, leading to increased costs and calibration time.

Innovation Solution

A USB controller with automatic clock generation using a combination of oscillators, phase locked loops (PLLs), and a multiplexer to generate clocks without external crystal oscillation or internal calibration, synchronizing and filtering signals to meet USB specifications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If external crystal oscillation is used to synchronize USB device clock and host clock, then clock synchronization accuracy is improved, but production cost and PCB area increase

Engineering Contradiction:
Improveclock synchronization accuracyVSAvoidproduction cost
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent extracts and eliminates the external crystal oscillator from the USB device, using only internal oscillation circuits. The system achieves clock synchronization by detecting host clock signals and generating device clock signals through internal PLL circuits, removing the need for expensive external crystal components while maintaining synchronization accuracy within USB specification limits.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The USB device performs self-calibration of its internal oscillation circuit by detecting the host clock signal and automatically adjusting its device clock signal through PLL circuits. This self-service mechanism eliminates the need for external calibration equipment and reduces production costs while achieving the required clock drift specifications.

Inventive Principle:
Principle #25Self-service

2Measurement precision

If external crystal oscillation is used to synchronize USB device clock and host clock, then clock synchronization accuracy is improved, but PCB area increases

Engineering Contradiction:
Improveclock synchronization accuracyVSAvoidPCB area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent removes the external crystal oscillator component from the PCB, significantly reducing the required PCB area. The system achieves clock synchronization functionality using only internal oscillation circuits and PLL circuits integrated within the USB controller, eliminating the need for additional external components and their associated PCB space.

Inventive Principle:
Principle #2Taking out (Extraction)

3Area of stationary object

If internal oscillation circuit is used to generate USB clock, then PCB area is reduced, but calibration circuit and calibration time are required

Engineering Contradiction:
ImprovePCB areaVSAvoidcalibration time
Core Design Contradiction:
Area of stationary objectVSLoss of time

Solution Approach 1:

The USB device performs automatic self-calibration by detecting the host clock signal and using PLL circuits to generate and synchronize device clock signals. This self-service calibration process eliminates the need for external calibration equipment and manual calibration procedures, significantly reducing calibration time while maintaining the benefits of using only internal oscillation circuits.

Inventive Principle:
Principle #25Self-service

4Area of stationary object

If internal oscillation circuit is used to generate USB clock, then PCB area is reduced, but calibration circuit is required

Engineering Contradiction:
ImprovePCB areaVSAvoidcalibration circuit
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent eliminates the need for separate external calibration circuits by integrating the calibration functionality directly into the USB controller's internal PLL circuits. The device uses its existing internal oscillation circuit and PLL mechanism to perform both clock generation and calibration functions, removing the need for additional dedicated calibration circuitry while maintaining PCB area reduction.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Rapid clock generation for USB controllers, reducing production costs and calibration time while ensuring accurate data transmission by eliminating the need for external crystal oscillation and internal oscillator calibration.

Implementation Method 1

a first phase locked loop (PLL), used for receiving the initial clock and outputting a controller operating clock having a first frequency

Methodology Applied
Scientific EffectPhase Locked Loop frequency multiplication:

Implementation Method 2

by synchronizing the initial frame signal and filtering the jitter and noise by the third PLL so that the stabilizing frame signal conforms to the USB transmission specification

Methodology Applied
Scientific EffectPhase synchronization and jitter filtering:

Data Source

PatentUS10031881B1USB controller with automatic clock generation and method thereof
Publication Date: 2018.07.24 DYNA IMAGE CORPORATION
  • US10031881B1 patent drawing
  • US10031881B1 patent drawing
  • US10031881B1 patent drawing

AI summary

A USB controller with automatic clock generation comprising: an oscillating generator is used for generating an initial clock; a first phase locked loop is used for receiving the initial clock and outputting a controller operating clock having a first frequency; a controller is used for detecting at least one universal serial bus device and outputting an initial frame signal having a second frequency; a second phase lock loop is used for receiving the initial frame signal and outputting a sync frame signal having the first frequency; a third phase lock loop for receiving the sync frame signal and outputting a stabilizing frame signal having the first frequency; and a multiplexer is used for receiving the controller operating clock and the stabilizing frame signal and transmitting the controller operating clock or the stabilizing frame signals to the controller.