USB Hub Serial Routing With Local Re-Synchronization
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Solution Overview
Problem
The synchronization of clocks in USB HUB internal data transmission is difficult due to unequal distances and long signal connection lines, leading to high jitter and increased internal delay, which complicates the compatibility of multiple hubs when cascaded.
Innovation Solution
A method involving a USB HUB internal data transmission process that includes inserting data into the target serial data before the valid signal is asserted, using a multiplexer to transmit the inserted data to a high-speed routing module, and re-synchronizing the data with a local clock before transmission, reducing the need for global clock synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If long signal connection lines are used to connect transceivers around the chip, then the USB HUB can accommodate more ports and longer distances, but clock synchronization becomes difficult due to unequal distances causing phase differences and jitter
Solution Approach 1:
The patent divides the clock synchronization problem into segments by allowing each transceiver to independently re-synchronize serial data with its own local clock after receiving it from the routing module. This segmentation enables each transceiver to compensate for its specific phase differences and jitter independently, rather than requiring all transceivers to be perfectly synchronized to a single global clock.
Solution Approach 2:
The patent performs preliminary re-synchronization of serial data with the local clock at each transceiver before the data is transmitted further. By inserting re-synchronization bits and re-synchronizing the data in advance, the system prepares the data to be clock-synchronized, eliminating the need for complex global clock distribution and reducing jitter accumulation.
2Productivity
If global clock synchronization is maintained across all transceivers, then data transmission can be coordinated, but wiring complexity increases and jitter accumulates over long distances
Solution Approach 1:
The patent extracts the clock synchronization function from the global clock distribution system and relocates it to each individual transceiver. Each transceiver extracts and re-synchronizes the serial data with its own local clock independently, eliminating the need for complex global clock wiring and reducing the system's overall wiring complexity while maintaining data transmission coordination.
Solution Approach 2:
The patent introduces re-synchronization bits as an intermediary mechanism between the global clock system and individual transceivers. These intermediary bits carry synchronization information that allows each transceiver to independently align its local clock with the incoming serial data, mediating between the global coordination requirement and local independence.
3Adaptability or versatility
If more transceivers are added to support 7-port HUB, then port expansion is achieved, but the multiplexer complexity increases making direct application of global clock difficult
Solution Approach 1:
The patent segments the clock synchronization task from the multiplexer and assigns it to each individual transceiver. Instead of using a complex multiplexer that must handle clock synchronization for 7 different transceivers, each transceiver independently performs re-synchronization with its own local clock, simplifying the multiplexer design while supporting port expansion.
Solution Approach 2:
The patent enables each transceiver to serve itself by independently re-synchronizing the serial data with its own local clock. This self-service approach eliminates the need for the multiplexer to manage complex clock synchronization across multiple transceivers, allowing port expansion without proportionally increasing multiplexer complexity.
4Speed
If serial data is transmitted at high speed (480 MHz), then data transmission efficiency is improved, but the data becomes more sensitive to phase differences and jitter from long wiring
Solution Approach 1:
The patent performs preliminary re-synchronization of the high-speed serial data with each transceiver's local clock before the data is processed further. By re-synchronizing the data in advance and inserting synchronization bits, the system prepares the high-speed data to be robust against phase differences and jitter, maintaining signal integrity despite long wiring distances.
Solution Approach 2:
The patent changes the synchronization parameter from a fixed global clock phase to a flexible local clock phase that can be independently adjusted by each transceiver. This parameter change allows each transceiver to optimize its local clock phase to match the incoming high-speed serial data, compensating for phase differences and jitter caused by long wiring.
Data Source
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AI summary
The invention discloses a USB HUB internal data transmission method and a USB HUB chip. The USB HUB chip comprises at least a first USB transceiver, a second USB transceiver, a data bit insertion unit, a high-speed routing module and a re-synchronization unit before transmitting. Before a serial data valid signal is asserted, inserted data is inserted into serial data and then transmitted to the high-speed routing module, and the data and a clock are re-synchronized before transmitting to complete internal data transmission. According to the invention, a 480 MHz clock does not need to be synchronously transmitted with the serial data, high-frequency radiation is reduced, time sequence mismatching between the serial data and a global clock does not need to be considered, the difficulty of wiring and layout design is reduced, valid serial data bits do not need to be wasted for clock synchronization, internal delay of the HUB is reduced, long-distance wiring or expansion of more USB ports is facilitated, and compatibility in cascade application of a plurality of USB HUBs is improved.