USB Link Bridge State Machine for Latency Reduction
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Solution Overview
Problem
Current USB3.1 repeater solutions introduce excessive latency and compatibility issues when used with USB3.0 legacy devices, limiting cable length and data transfer rates due to increased link layer turn-around delay and inability to meet maximum data path latency requirements.
Innovation Solution
A USB link bridge device that includes a host side module and a device side module, with a data controller and bridge state machine, which locally manages link training and flow control, allowing for extended cable lengths without additional latency and maintaining compatibility with existing USB3.0 and USB3.1 devices by reconstructing data packets and sending acknowledgments within specified time frames.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If USB3.1 repeater solutions are used to extend cable length, then cable length is increased, but data path latency increases beyond the maximum 50 nanoseconds requirement
Solution Approach 1:
The USB link bridge is divided into separate host side module and device side module, each with independent receiver and transmitter circuits. This segmentation allows each module to operate independently with optimized timing, preventing cumulative latency that would occur with traditional repeater architectures.
Solution Approach 2:
The USB link bridge acts as an intermediary device between USB host and USB device, implementing a state machine that manages link training and data transmission. This intermediary controls the timing and flow of data packets, ensuring that latency remains within the 50 nanosecond requirement while enabling extended cable lengths.
2Length of stationary object
If traditional repeater architectures are used, then cable length is extended, but compatibility with USB3.0 legacy devices is lost due to link layer timer timeouts
Solution Approach 1:
The USB link bridge is designed to work with both USB3.0 and USB3.1 devices, providing universal compatibility. The state machine implementation allows the device to function as a transparent bridge for USB3.0 legacy devices while also supporting USB3.1 features, eliminating the need for separate solutions for different USB versions.
Solution Approach 2:
The invention changes the timing parameters and link layer behavior through its state machine implementation. By controlling when acknowledgments are sent and how link training is performed, the system can accommodate the stricter timing requirements of USB3.0 devices while maintaining extended cable length capability.
3Length of stationary object
If USB3.1 active cables with repeaters are used, then cable length is increased, but link layer turn-around delay increases causing timeouts with USB3.0 devices
Solution Approach 1:
The state machine performs preliminary link training and timing synchronization before actual data transmission begins. This preliminary action ensures that the link is properly calibrated for the extended cable length, preventing timing issues and turn-around delays during subsequent data operations.
Solution Approach 2:
The USB link bridge implements feedback mechanisms through its state machine that monitor link quality and timing parameters. This feedback allows the system to adjust its operation in real-time, maintaining optimal timing even with extended cable lengths and preventing link layer timeouts.
Data Source
AI summary
A universal serial bus (USB) link bridge device is disclosed. The USB link bridge device includes a host side module configured to be interfaced with a USB host. The host side module includes a receiver and is configured to receive serial data from the USB host, convert the received serial data into parallel data and store the parallel data into an elasticity buffer. A data controller coupled to the host side module is also included. The USB link bridge device further includes a device side module coupled to the data controller and includes a transmitter. The device side module is configured to receive parallel data from the data controller and convert the received parallel data into serial data and to transmit the serial data towards a USB device. The data controller includes a first-in-first-out (FIFO) memory and a bridge state machine, the data controller is configured to receive the parallel data from the host side module, return an acknowledge signal back to the host side module, store the parallel data in the FIFO memory and transmit the parallel data from the FIFO memory based on a configuration of the bridge state machine. The bridge state machine is configured to decide when to send the parallel data from the FIFO memory toward the USB device.