USB Packet Hash Labeling for Multi-Core Host Load Balancing

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Solution Overview

Problem

Current USB technologies fail to balance the load allocation of USB packets with internet packets, leading to inefficient CPU processing due to improper assignment of similar packets to different CPU cores, resulting in increased computational efforts and delays.

Innovation Solution

A USB device and host system that computes hash values for input packets, labels them with identifiers corresponding to specific CPU cores, and stores them accordingly, ensuring that packets with the same hash values are processed by the same core, thereby achieving load balancing and reducing computational burdens.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If USB packets are assigned to any core in the CPU using the existing allocation method, then the system can process packets, but the load allocation between USB packets and internet packets is unbalanced

Engineering Contradiction:
ImproveCPU processing efficiencyVSAvoidLoad allocation balance
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent segments USB packets into different categories based on their characteristics (USB packets versus internet packets) and assigns them to different CPU cores through separate queues. This segmentation allows balanced load allocation by ensuring that USB-specific processing tasks are handled by dedicated cores, preventing them from competing with internet packet processing for the same resources.

Inventive Principle:
Principle #1Segmentation

2Productivity

If similar packets with the same source and destination addresses are assigned to different cores, then multiple cores can process packets in parallel, but additional input/output operations are required to match similar packets

Engineering Contradiction:
ImprovePacket processing throughputVSAvoidTime for matching similar packets
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent merges similar packets (packets with the same source and destination addresses) into the same queue and assigns them to the same CPU core. This merging eliminates the need for additional input/output operations to match similar packets across different cores, as they are already grouped together and processed by a single core, reducing overhead while maintaining parallel processing capabilities for different packet types.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If the CPU processes packets without load balancing, then the system structure remains simple, but the processing speed and efficiency decrease

Engineering Contradiction:
ImprovePacket processing speedVSAvoidPacket allocation mechanism
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements preliminary classification and labeling of packets based on their characteristics before they are assigned to CPU cores. By pre-categorizing packets into different queues (USB packets versus internet packets) and assigning them to specific cores in advance, the system achieves load balancing and improved processing speed without requiring complex real-time allocation mechanisms during packet processing.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11455266B2Universal serial bus device and host
Publication Date: 2022.09.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11455266B2 patent drawing
  • US11455266B2 patent drawing

AI summary

A universal serial bus (USB) device includes a first storage device, a controller, and a second storage device. The first storage device is configured to store input packets to be transmitted to a USB host. The controller is configured to receive the input packets of the first storage device, respectively compute hash values of the input packets, and respectively label first identifiers in the input packets according to the hash values to correspond to one of cores of a central processing unit at the USB host end. Among the input packets, the input packets with the same hash value are labeled with the same first identifier. The second storage device is configured to store the input packets that are labeled with the first identifier. The controller is further configured to allow the input packets stored in the second storage device to be transmitted to the USB host.