USB Packet Timing Control for Reliable Data Transfer
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Solution Overview
Problem
Existing USB data transmission methods in electronic devices suffer from packet breakage and loss, leading to increased CPU resource utilization, decreased transmission speed, and frequent retransmissions due to error checking by applications, which complicates implementation logic and degrades overall performance.
Innovation Solution
Implementing a method where electronic devices adjust transmission delays based on error frequencies of data packets, allowing for delayed transmission and retransmission of packets with errors, and eliminating the need to identify maximum packet sizes, thereby reducing errors and optimizing transmission efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error checking is performed by application instead of kernel, then data integrity can be verified, but processing time increases and CPU resource utilization increases
Solution Approach 1:
The patent introduces an intermediary mechanism (USB subsystem/kernel) that handles error checking and packet validation, freeing the application layer from direct error checking responsibilities. This intermediary layer processes packets efficiently using hardware-assisted validation, reducing application CPU burden and processing time while maintaining data integrity through systematic error detection protocols.
Solution Approach 2:
The patent replaces software-based error checking (application-level processing) with hardware-assisted error detection mechanisms. By utilizing USB controller hardware features for packet validation and error detection, the system achieves faster processing with reduced CPU resource utilization while maintaining comprehensive data integrity verification.
2Speed
If data packets are transmitted continuously without delay, then transmission speed is maximized, but error frequency increases leading to packet loss and retransmissions
Solution Approach 1:
The patent implements periodic transmission delays between data packets based on error frequency monitoring. When error rates exceed thresholds, the system automatically introduces periodic delays in packet transmission, allowing the USB bus to stabilize and reducing error frequency. This periodic action maintains optimal transmission speed while preventing error accumulation that would lead to packet loss and retransmissions.
Solution Approach 2:
The patent employs feedback mechanisms where the receiving device monitors error frequency and sends control signals back to the transmitting device. Based on this feedback, the transmitting device dynamically adjusts transmission timing and delays, creating a closed-loop control system that optimizes both transmission speed and reliability by adapting to real-time bus conditions.
3Reliability
If maximum packet size identification is required for each data packet, then USB protocol compliance is maintained, but application implementation logic becomes complicated
Solution Approach 1:
The patent enables the USB subsystem and hardware controller to automatically handle maximum packet size identification and validation. The system self-services by using USB descriptor information and hardware registers to determine appropriate packet sizes without requiring complex application-level calculations or logic, thereby maintaining protocol compliance while simplifying application implementation.
Solution Approach 2:
The patent changes the approach from dynamic packet size calculation to using fixed or pre-determined packet sizes based on USB device capabilities. By utilizing USB configuration parameters and hardware-defined maximum packet sizes, the system maintains protocol compliance through standardized parameters rather than complex runtime calculations, significantly reducing application logic complexity.
Data Source
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AI summary
An electronic device according to various embodiments of the disclosure may include a USB connector, a USB interface, and a processor, wherein the processor may be configured to receive a first plurality of data packets from an external electronic device via the USB connector and the USB interface, identify a first error frequency corresponding to the first plurality of data packets, identify a first transmission delay time based on the first error frequency, transmit the first transmission delay time to the external electronic device via the USB connector and the USB interface, and receive, based on transmission of the first transmission delay time, a second plurality of data packets transmitted after the first plurality of data packets from the external electronic device via the USB connector and the USB interface, wherein transmission of each data packet of the second plurality of data packets is separated by the first transmission delay time. Other embodiments are possible.