USB PD Signal Conversion Circuit for Precise BMC Slope Control
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Solution Overview
Problem
Conventional methods for adjusting the slope of biphase mark coding (BMC) signals in USB PD communication struggle to precisely control the rise and fall times, making it difficult to meet eye diagram compliance tests.
Innovation Solution
A signal conversion circuit that includes a conversion timing generation module, signal amplitude calibration module, voltage-mode digital-to-analog conversion module, smoothing filter module, and transmission conversion module, which convert communication data signals into delay control signals, stepwise ramp signals, and finally a BMC transmission signal, allowing precise adjustment of slope and amplitude to meet compliance tests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional current-based slope adjustment methods are used, then the BMC signal slope can be adjusted, but the rise time and fall time cannot be precisely controlled to meet eye diagram compliance test requirements
Solution Approach 1:
The patent segments the slope adjustment process into multiple independent stages using a multi-stage delay control mechanism. Each stage controls a specific time interval (first time interval, second time interval, third time interval) with independent delay units, allowing precise control of rise time and fall time separately. This segmentation enables independent optimization of different signal transition phases to meet eye diagram compliance requirements.
Solution Approach 2:
The patent implements dynamic slope control by making the delay periods adjustable rather than fixed. The delay control signals can dynamically adjust the duration of each time interval based on signal conditions, enabling adaptive optimization of rise and fall times. This dynamic adjustment mechanism allows the system to meet varying eye diagram compliance requirements under different operating conditions.
2Speed
If steep slopes are used to improve signal transition speed, then rise time and fall time decrease, but it becomes difficult to simultaneously meet both rise time and fall time requirements for eye diagram compliance test
Solution Approach 1:
The patent divides the signal transition process into multiple segmented stages with different delay characteristics. The first delay unit, second delay unit, and third delay unit each handle specific portions of the transition, allowing steep slopes in critical regions while maintaining controlled transitions in other regions. This segmentation enables simultaneous optimization of both rise time and fall time without compromising overall signal integrity.
Solution Approach 2:
The patent applies different delay characteristics to different parts of the signal transition process. Specific delay units are optimized for rise time control while others are optimized for fall time control, creating local quality variations that accommodate the conflicting requirements of fast transition and precise timing control throughout the signal waveform.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit enables precise control of signal slope and amplitude, meeting eye diagram compliance tests without the need for off-chip components, facilitating easy integration on silicon wafers and enhancing market applicability.
Implementation Method 1
a voltage-mode digital-to-analog conversion (DAC) module, where an input terminal of the voltage-mode digital-to-analog conversion module is electrically connected to an output terminal of the conversion timing generation module, and the voltage-mode digital-to-analog conversion module is electrically connected to the signal amplitude calibration module and configured to convert the plurality of delay control signals into stepwise ramp signals
Implementation Method 2
a smoothing filter module, where an input terminal of the smoothing filter module is electrically connected to an output terminal of the voltage-mode digital-to-analog conversion module; and the smoothing filter module is configured to perform smoothing filtering processing on the stepwise ramp signals to obtain a first voltage signal
Data Source
AI summary
A signal conversion circuit is provided, relating to the field of universal serial bus power delivery (USB PD) communication technologies. The signal conversion circuit includes a conversion timing generation module, configured to convert an input communication data signal into a plurality of delay control signals; a signal amplitude calibration module; a voltage-mode digital-to-analog conversion module, where an input terminal of the voltage-mode digital-to-analog conversion module is electrically connected to an output terminal of the conversion timing generation module, and the voltage-mode digital-to-analog conversion module is electrically connected to the signal amplitude calibration module; a smoothing filter module, where an input terminal of the smoothing filter module is electrically connected to an output terminal of the voltage-mode digital-to-analog conversion module; and a transmission conversion module, wherein an input terminal of the transmission conversion module is electrically connected to an output terminal of the smoothing filter module.