USB PD Port Controller Dead-Battery Collision Avoidance
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Solution Overview
Problem
Existing USB power delivery (PD) systems lack robustness in avoiding port controller collisions, particularly when the master controller is unresponsive, leading to potential damage due to reverse current during a dead-battery scenario.
Innovation Solution
Implementing a dead-battery control (DBC) algorithm that enables cooperation between port controllers, using state machines and GPIO pins to ensure only one port controller provides power to the power sink, preventing collisions by recognizing each other and coordinating the power-path switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple port controllers are used in a USB PD system, then the system can provide more power delivery capability and flexibility, but the risk of port controller collisions increases, leading to potential damage from reverse current
Solution Approach 1:
The patent implements a preliminary action by detecting dead-battery conditions before power delivery collisions can occur. The port controller monitors VDD voltage levels and detects when the battery is removed or drained, then proactively enters a dead-battery control mode that prevents power path switch closure, thereby avoiding reverse current damage before it can happen.
Solution Approach 2:
The patent employs feedback mechanisms where the port controller continuously monitors system state through voltage detection on VDD and other pins. This feedback loop enables the controller to recognize dead-battery scenarios and adjust its power delivery behavior accordingly, preventing collisions by responding to real-time system conditions.
2Ease of operation
If the master controller is unresponsive, then the system loses centralized control, but port controllers still need to coordinate to avoid collisions
Solution Approach 1:
The patent implements self-service by enabling port controllers to autonomously detect dead-battery conditions and manage their own power path control without requiring master controller intervention. The port controller independently monitors VDD voltage, detects battery removal or drainage, and autonomously enters dead-battery control mode, making the system self-managing even when the master controller is unresponsive.
Solution Approach 2:
The port controller performs preliminary detection of dead-battery conditions through voltage monitoring before power delivery operations commence. This preliminary action allows the port controller to proactively prevent collision scenarios by entering dead-battery control mode in advance, ensuring safe operation without master controller guidance.
3Reliability
If the port controller autonomously detects dead-battery scenarios, then power delivery safety is improved, but the control logic complexity increases
Solution Approach 1:
The patent replaces complex software-based dead-battery detection and control logic with hardware-based voltage detection circuits and state machine implementations. The port controller uses dedicated detection circuits that monitor VDD voltage levels and automatically trigger dead-battery control modes through hardware state machines, eliminating the need for complex software algorithms while maintaining reliable detection.
Data Source
Figure 1
Figure 2A
Figure 2B
AI summary
For power delivery, port controllers (205, 210) each include a state machine (220), an IO pin, a receptacle supply pin receiving power from a receptacle (235, 240), a gate driver pin coupled to a control node of a power path switch (215a, 215b) each having an output coupled to a load (245). The state machines implement a dead-battery control (DBC) algorithm upon sensing a DB condition. The DBC algorithm pulls up the GPIO pin, starts a timer for T1, and monitors the GPIO pin for T1. If the GPIO pin is pulled low, the port controller is reset for a pulled low period, the DBC algorithm is then restarted or its GPIO pin is monitored until not pulled low for T1. One port controller pulls its GPIO pin low for an assertion period to claim priority over the other port controller, and closes its associated power path switch to exclusively provide power to the load.