USB-PD Load Transient Detection Circuit for VBUS Stability

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Solution Overview

Problem

Conventional USB-PD IC controllers face challenges in effectively limiting VBUS overshoot/undershoot during smooth transition modes due to slow firmware-based load transient detection, leading to more extreme voltage fluctuations.

Innovation Solution

Analog detection circuitry is introduced to detect excessive slew rates of the sense signal, allowing the gate driver controller to override duty cycle limits, thereby improving load transient response and reducing overshoot/undershoot.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If firmware-based load transient detection is used, then the system can detect load changes, but the response time is slow (10 us to 100 us) leading to extreme VBUS overshoot/undershoot

Engineering Contradiction:
Improveload transient detection accuracyVSAvoidresponse time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent replaces the firmware-based detection system with an analog detection circuit that directly monitors the sense signal and detects slew rate changes. This substitution of the detection mechanism from software to hardware eliminates the ADC conversion and firmware processing delays, achieving response times in the nanosecond range compared to the microsecond range of firmware-based systems.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces an intermediate analog detection circuit between the sense resistor and the finite state machine. This intermediary circuit processes the sense signal in the analog domain, detecting slew rate changes before digital conversion, thereby reducing the overall system response time while maintaining detection accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Extent of automation

If ADC and firmware are used for load transient detection, then detection can be implemented, but multiple delays are introduced causing extreme VBUS overshoot/undershoot

Engineering Contradiction:
Improveautomatic load transient detectionVSAvoiddetection delay
Core Design Contradiction:
Extent of automationVSLoss of time

Solution Approach 1:

The patent replaces the automated firmware-based detection process with an analog circuit that automatically detects load transients through voltage slew rate monitoring. This eliminates the sequential delays of ADC conversion and firmware processing while maintaining automatic detection capability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Stability of the object's composition

If duty cycle changes are limited in smooth transition mode, then USB-PD negotiation stability is improved, but load transient response becomes sluggish causing extreme VBUS overshoot/undershoot

Engineering Contradiction:
ImproveVBUS voltage stabilityVSAvoidload transient response speed
Core Design Contradiction:
Stability of the object's compositionVSSpeed

Solution Approach 1:

The patent implements a dynamic duty cycle control mechanism where the analog detection circuit monitors load conditions in real-time. When a load transient is detected through slew rate analysis, the system dynamically adjusts the duty cycle limit, allowing rapid response to transients while maintaining smooth transition mode stability during normal operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent introduces feedback from the analog detection circuit to the gate driver controller. The detection circuit continuously monitors the sense signal and provides feedback about load transient conditions, enabling the controller to adjust duty cycle limits dynamically based on actual load conditions rather than operating with fixed limits.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11886264B2Load transient detection circuit and method
Publication Date: 2024.01.30 INFINEON TECHNOLOGIES AMERICAS CORP
  • US11886264B2 patent drawing
  • US11886264B2 patent drawing
  • US11886264B2 patent drawing

AI summary

A Universal Serial Bus (USB)-Power Delivery (PD) integrated circuit (IC) controller is described. The controller includes: a driver circuit configured to control operation of a buck-boost converter electrically coupled to a USB voltage bus power line; a gate driver controller configured to control the driver circuit in a first mode, wherein changes in duty cycle are limited to a predetermined number of cycles in the first mode; a sense circuit configured to generate a sense signal proportional to current flowing in the USB voltage bus power line; and an analog detection circuit configured to detect whether a slew rate of the sense signal exceeds a reference slew rate. The gate driver controller is configured to override the limit placed on the changes in duty cycle in the first mode responsive to the analog detection circuit indicating that the slew rate of the sense signal exceeds the reference slew rate.