USB Physical Layer Wake-Up for Low-Power Reconnection

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Solution Overview

Problem

Existing USB peripheral devices maintain high power consumption in sleep mode due to the presence of a power-on area, which is not conducive to power-saving.

Innovation Solution

An electronic apparatus with a low power wake-up mechanism that utilizes a physical layer circuit to detect logic state transitions in differential signal lines of a USB interface, restoring power to an upper layer circuit and modifying voltage states to detect plug-in and pull-out events, allowing for an initialization and enumeration process with the host apparatus.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a power-on area is maintained to store previous state information for quick reconnection, then the reconnection speed is improved, but the power consumption in sleep state increases

Engineering Contradiction:
Improvereconnection speedVSAvoidpower consumption in sleep state
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent extracts the state storage function from the upper layer circuit's power-on area and relocates it to the physical layer circuit's register. This allows the upper layer circuit to be fully powered off in sleep state while the physical layer circuit maintains minimal power operation to preserve state information, thus resolving the contradiction between quick reconnection and low power consumption.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The physical layer circuit acts as an intermediary between the upper layer circuit and the host apparatus. It stores state information in its register and manages the wake-up process by detecting USB bus events, enabling the upper layer circuit to be fully powered off while still supporting quick reconnection through the intermediary's state preservation capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Use of energy by moving object

If the upper layer circuit is fully powered off in sleep state, then power consumption is reduced, but the wake-up and reconnection process becomes more complex

Engineering Contradiction:
Improvepower consumption in sleep stateVSAvoidwake-up mechanism complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent segments the USB device into two independent functional parts: the physical layer circuit that remains partially active to monitor USB bus events and store state information, and the upper layer circuit that can be fully powered off. This segmentation allows the upper layer to achieve low power consumption while the physical layer handles the wake-up complexity through event detection and state management.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260031722A1Electronic apparatus and operation method thereof having a low power wake-up mechanism
Publication Date: 2026.01.29 REALTEK SEMICON CORP
  • US20260031722A1 patent drawing
  • US20260031722A1 patent drawing
  • US20260031722A1 patent drawing

AI summary

The present disclosure discloses an electronic apparatus having low power wake-up mechanism that includes an upper layer circuit and a physical layer. The upper layer circuit is powered off in a sleep state. The physical layer wakes up the upper layer circuit in the sleep state according to a logic state transition event that switches a pair of differential signal lines of a USB interface from a sleep logic state to a wakeup logic state such that a power of the upper layer circuit is restored. The physical layer modifies a voltage state of the differential signal lines to drive a host apparatus to detect a pull-out event and a plug-in event in series. The physical layer controls the upper layer circuit to perform initialization and enumeration process with the host apparatus to reconnect with the host apparatus.