USB Transaction Translator Micro-Frame Synchronization

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Solution Overview

Problem

The existing USB 3.0 transaction translators face access conflicts and accumulated clock period differences when synchronizing micro-frames between USB 2.0 devices and USB 3.0 hosts, leading to inefficiencies in bandwidth usage and data transfer reliability, particularly during isochronous transactions.

Innovation Solution

A USB 3.0 transaction translator with a device interface, host interface, buffers, and a start-of-frame counter that synchronizes the sending of SOF and isochronous timestamp packets by delaying the SOF packet based on the received isochronous timestamp, ensuring simultaneous transmission and resolving access conflicts and clock period differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the U3TT sends SOF packets continuously to announce micro-frame time, then the device can maintain timing information, but access conflicts occur when host and device simultaneously access the same buffer

Engineering Contradiction:
Improvetiming information accuracyVSAvoidaccess conflict
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent divides the buffer into multiple buffers (first buffer and second buffer) to segment the data storage space. The controller alternates between these buffers when performing data pre-fetch operations, which prevents simultaneous access conflicts between host and device while maintaining continuous timing information through SOF packet transmission.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic buffer switching where the controller dynamically selects which buffer to access based on the current micro-frame timing and host device synchronization state. This dynamic allocation prevents access conflicts by ensuring that host and device never simultaneously access the same buffer during the same micro-frame period.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If the host and U3TT use different clock sources, then each side can operate independently, but accumulated clock period differences cause synchronization problems

Engineering Contradiction:
Improveindependent operationVSAvoidsynchronization accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the U3TT receives isochronous timestamp packets (ITP) from the host containing timing information, and uses this feedback to adjust its own SOF packet transmission timing. The controller calculates the time difference between host and device clocks and compensates for it by delaying or advancing SOF packet sending, thereby maintaining synchronization despite independent clock sources.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically changes the timing parameters of SOF packet transmission based on the received ITP timing information. The controller adjusts the transmission timing parameter of SOF packets to compensate for clock period differences, ensuring that both host and device operate in sync even though they use different clock sources.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If the U3TT pre-fetches data during half of the micro-frame time, then bandwidth usage improves, but access conflicts occur with the host reading from the same buffer

Engineering Contradiction:
Improvebandwidth usageVSAvoidaccess conflict
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent segments the buffer into multiple buffers and uses time-division multiplexing to allocate different time periods for host reading and device pre-fetch operations. During the first half of the micro-frame time, the device performs pre-fetch operations on the first buffer while the host reads from the second buffer, eliminating access conflicts while maintaining high bandwidth usage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent resolves the access conflict by adding a temporal dimension to buffer access - instead of competing for the same buffer simultaneously, the device performs pre-fetch operations in the first half of the micro-frame while the host reads in the second half, effectively using time as an additional dimension for resource allocation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8452909B2USB transaction translator and a micro-frame synchronization method adaptable to an USB in isochronous transaction
Publication Date: 2013.05.28 EVERPRO TECH COMPANY
  • US8452909B2 patent drawing
  • US8452909B2 patent drawing
  • US8452909B2 patent drawing

AI summary

The present invention is directed to a universal serial bus (USB) transaction translator and a micro-frame synchronization method. A device interface is coupled to a device via a device bus, and a host interface is coupled to a host via a host bus, wherein the host USB version is higher than the device USB version. At least two buffers configured to store data are disposed between the device interface and the host interface. A controller stores the data in the buffers alternately. A start-of-frame (SOF) counter is used to count the SOF packets, wherein the counting value of the SOF counter is compared to a predefined value. Specifically, the controller resets a SOF timer for sending the SOF packet when the counting value achieves the predefined value or is greater than the predefined value, such that the SOF packet and an isochronous timestamp packet (ITP) from the host are sent at the same time. Further, the controller delays the sending of the SOF packet for a period of time according to the ITP from the host.