User-Level Exception Handling for Legacy Instruction Emulation

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Solution Overview

Problem

As the number of processor cores increases, hardware-based legacy instruction set architecture support becomes costly and wasteful, while software-based emulation techniques like interpretation and dynamic binary translation suffer from high performance overhead, especially due to kernel-level exception handling latency.

Innovation Solution

Implementing on-demand emulation via user-level exception handling, which reduces execution time by allowing a user-level handler to directly manage exceptions without kernel-level state changes, and combines with dynamic binary translation to minimize emulation frequency and overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hardware support is implemented for legacy ISA instructions, then backward compatibility is achieved, but semiconductor real estate cost increases significantly

Engineering Contradiction:

Improvebackward compatibilityVSAvoidsemiconductor real estate

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent implements software-based emulation that copies the behavior of legacy ISA instructions through dynamic binary translation, creating virtual hardware functionality without physical hardware implementation. This allows backward compatibility to be achieved through software simulation rather than hardware duplication, significantly reducing semiconductor real estate requirements.

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The patent replaces the mechanical/hardware-based instruction support with a software-based emulation system using dynamic binary translation. Instead of implementing physical hardware circuits for legacy instructions, the system translates and emulates instruction behavior through software, substituting hardware mechanisms with software equivalents.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If software-based emulation is implemented on each core, then hardware resource sharing is avoided, but performance overhead increases significantly

Engineering Contradiction:

Improveemulation flexibilityVSAvoidperformance

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent performs preliminary action by translating and preparing emulated instructions before they are executed. Through dynamic binary translation, the system proactively translates legacy instructions into native instructions, preparing the translated code in advance so that when execution occurs, the translated instructions can be executed directly without repeated translation overhead, significantly reducing performance penalty.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamic binary translation that adapts the emulation process based on runtime conditions. The system dynamically translates instructions at execution time rather than using static interpretation, allowing the emulation to adjust to varying workloads and optimize performance based on actual execution patterns and hot/cold code identification.

Inventive Principle:

Principle #15Dynamics

3Extent of automation

If kernel-level exception handling is used, then exception management is centralized, but execution time increases due to state saving and restoring

Engineering Contradiction:

Improveexception managementVSAvoidexception handling latency

Core Design Contradiction:

Extent of automationVSLoss of time

Solution Approach 1:

The patent segments the exception handling process into finer-grained, more manageable units. Instead of using heavy kernel-level exception handling for all cases, the system implements user-level exception handling for specific emulation scenarios, dividing the exception management workload into smaller, faster-to-execute segments that reduce overall latency while maintaining centralized coordination where needed.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS8146106B2On-demand emulation via user-level exception handling

Publication Date: 2012.03.27 INTEL CORP

AI summary

Methods and apparatuses enable on-demand instruction emulation via user-level exception handling. A non-supported instruction triggers an exception during runtime of a program. In response to the exception, a user-level or application-level exception handler is launched, instead of a kernel-level handler. Then the exception handler can execute at the application layer instead of the kernel level. The handler identifies the instruction and emulates the instruction, where emulation of the instruction is supported by the handler. Emulating the instructions enables the program to continue execution. Repeated instruction emulation is amortized via dynamic binary translation of hot code.