User-Level Hardware Branch Records for Runtime Tracing
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Solution Overview
Problem
Existing solutions for recording control flow information in software are slow and laborious, causing significant runtime overheads, and hardware-based mechanisms are not optimized for runtime execution or are only accessible in kernel-mode, making it difficult for user-level processes to access branch tracing information.
Innovation Solution
A processor with hardware registers and circuitry that stores branch addresses and allows user-level processes to access branch tracing information efficiently, using Last Branch Record (LBR) registers and specialized circuitry to record and retrieve branch information, while maintaining security by controlling access during mode switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If software-based implementations are used to record every branch and return address, then control flow information can be obtained, but significant runtime overheads are caused
Solution Approach 1:
The patent replaces software-based branch recording mechanisms with hardware-based Last Branch Record (LBR) registers and circuitry. The hardware automatically captures branch instruction addresses and target addresses in dedicated registers, eliminating the need for software intervention and avoiding the runtime overhead associated with software-based implementations.
Solution Approach 2:
The hardware circuitry automatically records branch information without requiring external control or software management. The LBR registers self-update on branch instructions, and the system self-manages the recording process, freeing the software from the laborious task of tracking control flow manually.
2Speed
If hardware-based mechanisms are used for recording branch addresses, then recording speed is improved, but they are not optimized for runtime execution or are only available in kernel-mode operation
Solution Approach 1:
The patent segments the access rights to LBR registers into different modes: kernel-mode and user-mode. The hardware provides full access to LBR registers in kernel-mode while providing controlled access in user-mode through specific instructions. This segmentation allows optimized hardware recording while enabling safe user-level access through proper authorization mechanisms.
3Ease of operation
If user-level processes are granted access to branch tracing information, then ease of operation is improved, but security concerns arise regarding kernel-level information
Solution Approach 1:
The patent implements different access qualities for different user-level processes based on their authorization status. Authorized processes can access LBR registers through specific instructions, while unauthorized processes cannot. This local differentiation of access rights allows legitimate users to obtain branch tracing information while protecting kernel-level security.
Data Source
AI summary
A processor, a method and a computer-readable medium for recording branch addresses are provided. The processor comprises hardware registers and first and second circuitry. The first circuitry is configured to store a first address associated with a branch instruction in the hardware registers. The first circuitry is further configured to store a second address that indicates where the processor execution is redirected to as a result of the branch instruction in the hardware registers. The second circuitry is configured to, in response to a second instruction, retrieve a value of at least one of the registers. The second instruction can be a user-level instruction.