User Space Interrupt Handling via Dedicated Thread Resumption

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing methods for handling interrupts in computer systems are inefficient, leading to high performance overhead and latency due to the difficulty in communicating interrupts from the kernel space to the user space, requiring complex code splitting and increased resource consumption.

Innovation Solution

An interrupt handling method that stores interrupt numbers and corresponding ISR handlers in memory, creates threads for I/O devices, and executes ISR in the kernel space while resuming threads to execute user-defined functions in the user space, with a priority boosting mechanism to reduce latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If interrupts are communicated from kernel space to user space using conventional event queue methods, then user space interrupt handling is achieved, but performance overhead and latency increase significantly

Engineering Contradiction:
Improveuser space interrupt handling capabilityVSAvoidsystem performance and latency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent extracts the interrupt handling logic from the kernel space event queue mechanism and implements a dedicated interrupt handling thread in user space. This thread directly communicates with the I/O device through memory-mapped I/O registers, eliminating the need for complex kernel-to-user space event queue communication and lock management, thereby reducing performance overhead and latency

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a user space interrupt handling thread as an intermediary between the I/O device and user applications. This thread monitors interrupt status registers in memory, processes interrupt conditions, and notifies waiting threads, thereby enabling efficient user space interrupt handling without requiring kernel space involvement for each interrupt event

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If interrupt service routine is split into two processes (kernel space event capturing and user space event processing), then user space execution is enabled, but code complexity and resource consumption increase

Engineering Contradiction:
Improveuser space execution capabilityVSAvoidinterrupt handling code structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the event capturing and event processing functions into a single user space interrupt handling thread. This thread directly reads interrupt status from memory-mapped I/O registers and processes events without requiring separate kernel space event queue management code, thereby simplifying the overall code structure while maintaining user space execution capability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The user space interrupt handling thread performs multiple functions: it monitors interrupt status registers, processes interrupt conditions, manages event queues, and notifies application threads. This multi-functional approach eliminates the need for separate kernel space event capturing code and user space processing code, reducing overall system complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If lock management is implemented for event queue access in interrupt service routine, then thread safety is ensured, but execution time and latency increase

Engineering Contradiction:
Improvethread safety and data consistencyVSAvoidinterrupt handling latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements self-service interrupt handling where the user space interrupt handling thread autonomously manages its own event queue and thread safety without requiring kernel space lock management. The thread uses atomic operations and memory barriers to ensure data consistency while avoiding the overhead of traditional lock acquisition and release operations

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent pre-allocates event queues and initializes thread safety mechanisms before interrupt handling begins. This preliminary setup eliminates the need for dynamic lock management during interrupt processing, thereby reducing latency while maintaining thread safety through pre-configured data structures and atomic operation protocols

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11687366B2Interrupt handling method, computer system, and non-transitory storage medium that resumes waiting threads in response to interrupt signals from I/O devices
Publication Date: 2023.06.27 MITSUBISHI ELECTRIC CORP
  • US11687366B2 patent drawing
  • US11687366B2 patent drawing

AI summary

The present invention provides an interrupt handling system for handling interrupts in a computer system is provided. The interrupt handling system captures and processes the interrupts in a user space of the computer system. The present invention also provides for an interrupt registration method that facilitates interrupt handling in the user space during porting of user applications from one platform to another.