UTBB CMOS Imager Capacitive Coupling for Bulk Reduction
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Solution Overview
Problem
Existing image sensor devices face bulkiness issues due to the juxtaposition of reading transistors and photodetection areas, leading to reduced light collection efficiency and increased device size, as well as alignment and mechanical stress challenges during assembly.
Innovation Solution
An image sensor device with a transistor on a substrate featuring a thin semi-conducting layer and an insulating layer that enables capacitive coupling between the photodetection area and the transistor channel, allowing for efficient light radiation detection without the need for dedicated connections, thereby optimizing surface area usage and reducing bulk.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a reading transistor and photodetection area are juxtaposed in conventional CMOS sensors, then light collection efficiency is reduced and device size increases, but electrical connection between the two components is ensured
Solution Approach 1:
The patent merges the photodetection area and transistor channel into a vertically integrated structure where the photodetection area is formed in a first semiconductor layer and the transistor channel is formed in a second semiconductor layer directly above it, separated only by a thin insulating layer. This eliminates the lateral juxtaposition of conventional CMOS sensors, maximizing light collection area while maintaining electrical connection through capacitive coupling.
Solution Approach 2:
The patent transitions from a lateral arrangement where the photodetection area and transistor are side-by-side to a vertical arrangement where the transistor channel is positioned directly above the photodetection area. This dimensional change allows the entire photosensitive surface to be dedicated to light detection while the transistor operates in the vertical dimension, resolving the conflict between detection area and device bulk.
2Reliability
If photodetection area and transistor are vertically integrated with thin insulating layer, then capacitive coupling enables efficient signal transmission, but manufacturing precision requirements increase
Solution Approach 1:
The patent replaces the mechanical/electrical connection system with a capacitive coupling system. Instead of requiring direct physical contact or closely spaced electrical contacts between the photodetection area and transistor, the thin insulating layer (5-50 nm) enables electrical signal transmission through capacitive coupling, where the insulating layer acts as the dielectric between two capacitive plates. This substitution reduces manufacturing precision requirements while maintaining reliable signal transmission.
3Ease of manufacture
If conventional assembly with indium beads is used, then electrical connection is achieved, but alignment accuracy and mechanical stress problems arise
Solution Approach 1:
The patent extracts and eliminates the indium bead assembly step from the manufacturing process. By forming the photodetection area and transistor in a vertically integrated structure with capacitive coupling through a thin insulating layer, the need for separate electrical connection elements like indium beads is removed entirely. This integration simplifies the manufacturing process and eliminates alignment and mechanical stress issues associated with bead assembly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances light detection efficiency by maximizing the photodetection area, reduces mechanical stress, and simplifies assembly by eliminating the need for precise alignment, resulting in a more compact and sensitive imaging device.
Implementation Method 1
The material from which the insulating layer is formed, as well as the thickness of this insulating layer, are set such that a capacitive coupling can be established between the photodetection area and the channel area of said transistor.
Implementation Method 2
a photodetection element such as a photodiode
Data Source
AI summary
An image sensor device is provided, including at least one transistor lying on a semiconductor-on-insulator substrate that includes a semi-conducting layer, in which a channel area of the transistor is disposed in a portion thereof, and an insulating layer separating the semi-conducting layer from a semi-conducting support layer, wherein the semi-conducting layer and the insulating layer extend beyond the channel area, and extend under at least a portion of source/drain regions of the transistor, wherein the semi-conducting support layer includes at least one photosensitive area including at least one P-doped region and at least one N-doped region forming a junction, the photosensitive area being disposed facing the transistor on a side of the channel area thereof and opposite a side of a gate electrode thereof, and wherein the insulating layer is configured to provide a capacitive coupling between the photosensitive area and the semi-conducting layer.