Light-Shielding Layer Blocks UV in Polysilicon TFTs

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Solution Overview

Problem

In the manufacturing of display panels, UV light exposure affects polysilicon layers in thin film transistors, leading to threshold voltage drift and requiring a lengthy annealing process, which increases production time and decreases productivity.

Innovation Solution

Incorporating a light-shielding layer, specifically an amorphous silicon layer of 600 Å to 1500 Å thickness, between the polysilicon layers and light-emitting structures to block UV light, preventing its transmission to the polysilicon layers and eliminating the need for an annealing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If UV light exposure is used in manufacturing, then light-emitting structures can be formed, but polysilicon layers experience threshold voltage drift

Engineering Contradiction:
Improvemanufacturing processVSAvoidthreshold voltage stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

An amorphous silicon layer is introduced as an intermediary between the polysilicon layer and the light-emitting structure. This intermediate layer absorbs UV light before it reaches the polysilicon layer, preventing threshold voltage drift while allowing the manufacturing process to proceed normally.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The harmful UV light exposure is converted into a beneficial effect by using the amorphous silicon layer to absorb the UV energy. The UV light that would otherwise damage the polysilicon layer is now utilized to form or modify the amorphous silicon protective layer, turning a harmful process into a useful one.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If annealing process is applied to correct threshold voltage drift, then polysilicon layer stability is improved, but production time increases

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidproduction time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The amorphous silicon layer is formed in advance during the manufacturing process, before UV light exposure occurs. This preliminary protective layer prevents threshold voltage drift from occurring in the first place, eliminating the need for subsequent annealing processes and reducing production time.

Inventive Principle:
Principle #10Preliminary action

3Object-affected harmful factors

If amorphous silicon layer thickness is increased, then UV light blocking capability is improved, but material usage increases

Engineering Contradiction:
ImproveUV light blockingVSAvoidamorphous silicon material
Core Design Contradiction:
Object-affected harmful factorsVSLoss of substance

Solution Approach 1:

The thickness of the amorphous silicon layer is optimized to a specific range (600-1500 Å) where it provides sufficient UV light blocking capability while minimizing material consumption. This parameter optimization balances protective function with material efficiency.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The light-shielding layer effectively prevents UV light from affecting the polysilicon layers, avoiding threshold voltage drift and reducing production time while improving productivity by eliminating the annealing process.

Implementation Method 1

a light-shielding layer for blocking ultraviolet (UV) light that is located between the polysilicon layer and the light-emitting structures

Methodology Applied
Scientific EffectUV light absorption: Absorption (EM radiation)

Data Source

PatentUS10930788B2Display panel and manufacturing method thereof, and display device
Publication Date: 2021.02.23 BOE TECHNOLOGY GROUP CO LTD
  • US10930788B2 patent drawing
  • US10930788B2 patent drawing
  • US10930788B2 patent drawing

AI summary

A display panel includes a base substrate, and thin film transistors positioned on the base substrate. Each thin film transistor includes a polysilicon layer. The display panel further includes a light-shielding layer for blocking ultraviolet (UV) light that is located at a side of the polysilicon layer away from the base substrate. An orthographic projection of the polysilicon layer on the substrate is in a range of an orthographic projection of the light-shielding layer on the substrate.