UV-Protected Integrated Circuit Memory with Reference Cell Detection
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Solution Overview
Problem
Existing integrated circuits using UV erasure for non-volatile memory cells face issues with high power consumption and read errors due to the need for elevated read voltages and sensitivity to retention loss, and existing solutions require multiple read voltages or high conductive states during reading.
Innovation Solution
Implementing two groups of electrically programmable reference memory cells with authorized bit combinations, where the integrated circuit blocks operations if the reference memory cells contain forbidden bit combinations, allowing for protection against UV erasure without using read voltages higher than the UV state threshold or requiring multiple read voltages, and utilizing a wired-logic circuit to evaluate these cells upon power-on.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If UV erasure is used to erase memory cells, then the memory can be reset to initial state, but the circuit becomes vulnerable to fraudulent erasure and data integrity is compromised
Solution Approach 1:
The patent applies preliminary action by pre-programming reference memory cells with specific reference values before normal operation begins. These reference cells are programmed once during manufacturing or initialization, and their states serve as a permanent baseline for detecting UV erasure attempts. The reference cells are positioned to be affected by UV exposure in the same way as data cells, allowing the system to proactively detect erasure attempts rather than reactively respond to data corruption.
Solution Approach 2:
The patent implements feedback by continuously monitoring the state of reference memory cells during read operations and comparing their values against expected reference patterns. The read circuitry evaluates whether reference cell values match predetermined criteria, and this feedback determines whether the system should proceed with normal data access or trigger protective measures. This real-time feedback mechanism enables the system to detect UV erasure attempts and block access before fraudulent data modification can occur.
2Reliability
If high read voltages are used to read memory cells in UV state, then reading can be performed, but power consumption increases
Solution Approach 1:
The patent applies parameter changes by implementing a dual-threshold read voltage scheme that dynamically adjusts the read voltage level based on the detected state of reference memory cells. When reference cells indicate normal operation, a standard read voltage is used. When reference cells show signs of UV erasure, the system switches to a higher read voltage threshold to ensure accurate reading of cells in UV state. This conditional parameter adjustment allows the system to optimize power consumption by using higher voltages only when necessary for detecting erasure attempts.
3Measurement precision
If multiple read voltages are used to detect UV state, then detection accuracy improves, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the memory array into functionally distinct regions: reference memory cells and data memory cells. The reference cells are spatially separated and configured with different initial states (all programmed to logic 1), allowing them to serve as dedicated sensors for UV erasure detection. This segmentation enables the use of simplified read circuitry that evaluates reference cell states independently, avoiding the need for complex multi-voltage switching mechanisms while maintaining high detection accuracy through the clear distinction between reference and data cell functions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively prevents UV erasure without increasing power consumption or causing read errors, allowing for rapid data reading and reduced sensitivity to retention loss, as it blocks the circuit if forbidden bit combinations are detected, ensuring data integrity.
Implementation Method 1
exposing the memory MEM1 to a particle beam, usually a UV beam (beam of ultraviolet light). This UV beam has the effect of extracting electric charges from memory cells and bringing them into an electrical state called UV state.
Data Source
AI summary
A method protects against a global data erasure an integrated circuit comprising an electrically programmable data memory and a control unit to execute commands for reading or writing in the memory. The method includes the steps of providing, in the integrated circuit, electrically programmable reference memory cells, at putting the integrated circuit into service, storing, in the reference memory cells, bits of determined value forming an authorized combination of bits and, during the operation of the integrated circuit following its putting into service, reading and evaluating the reference memory cells and blocking the integrated circuit if the reference memory cells contain a forbidden combination of bits different from the authorized combination.