UVM Verification Platform Address-Based Data Sorting

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Solution Overview

Problem

Conventional UVM verification platforms face challenges in handling out-of-order transmission on buses, leading to incorrect verification results due to unsynchronized data, which affects the reliability of device verification.

Innovation Solution

A device verification method that determines a transaction class for a device under test, instantiates interfaces for input and output data, and compares data sequentially based on addresses to ensure synchronized comparison, thereby avoiding the impact of out-of-order transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If sequential one-by-one comparison is used for input data and output data, then the comparison process is simple, but wrong verification results are generated due to out-of-order transmission

Engineering Contradiction:
Improvecomparison process complexityVSAvoidverification result reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-sorting the input data array and output data array based on address values before comparison. The sorting operation is performed in advance (pre-action) to ensure that corresponding input and output data are properly aligned, preventing verification errors caused by out-of-order transmission. This resolves the contradiction by maintaining simple comparison logic while ensuring reliable verification results through preliminary data preparation.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If data are sent early but output results arrive later, then out-of-order transmission is supported, but sequential comparison generates wrong verification results

Engineering Contradiction:
Improveout-of-order transmission supportVSAvoidverification result accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent uses preliminary action by sorting both input and output data arrays by address before comparison. This pre-processing step ensures that even when data arrive out of order, they are properly aligned with their corresponding counterparts, maintaining verification accuracy while supporting out-of-order transmission scenarios.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary sorting mechanism that acts as a mediator between the out-of-order data arrival and the comparison process. By using address-based sorting as an intermediary step, the system reconciles the timing mismatch between early data sending and later result arrival, ensuring accurate verification without requiring strict synchronization.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If conventional TLM level communication is used, then standardized interfaces are provided, but synchronized comparison of input and output data cannot be achieved

Engineering Contradiction:
Improveinterface standardizationVSAvoiddata synchronization accuracy
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent maintains the benefits of standardized TLM interfaces while adding a preliminary sorting step that operates on the data arrays before comparison. This preliminary action ensures that the standardized interfaces continue to provide ease of operation, while the address-based sorting achieves reliable data synchronization that the conventional TLM communication alone cannot provide.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11893331B2Device verification method, UVM verification platform, electronic apparatus and storage medium
Publication Date: 2024.02.06 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • US11893331B2 patent drawing

AI summary

A device verification method, a UVM verification platform, an electronic apparatus, and a storage medium are provided. The method includes: determining a transaction class corresponding to a device under test, and instantiating a first interface in a callback function; sending input data to the device under test based on a bus protocol, and sequentially adding the input data to an array of the first interface according to addresses of the input data; instantiating a second interface in a monitor device, and sequentially adding output data to an array of the second interface according to addresses of the output data; and comparing the input data and the output data that have same addresses in the array of the first interface and the array of the second interface, and outputting a verification result of the device under test according to a comparison result.