Wireless Clock Synchronization in UWB Access Point Networks

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Solution Overview

Problem

Existing wireless access point systems for ultra-wideband communication face challenges in clock synchronization, particularly due to the high cost and complexity of wired implementations, and the need for a method that achieves precision comparable to prior art techniques without these disadvantages.

Innovation Solution

A wireless clock synchronization method and apparatus using a central location engine to calculate and normalize timebases across access points through the transmission and reception of clock synchronization packets, leveraging digital phase locked loops to adjust for skew between timebases, allowing for precise synchronization without the need for physical reconfiguration or wired connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If wired distribution of master clock signal is used, then clock synchronization precision is improved, but installation cost and physical configuration complexity increase

Engineering Contradiction:
Improveclock synchronization precisionVSAvoidphysical configuration complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces the mechanical/wired clock signal distribution system with a wireless communication system. Access points synchronize clocks by exchanging timestamped packets over wireless UWB channels, eliminating the need for physical wired connections while achieving comparable synchronization precision through software-based time reference exchange and adjustment mechanisms

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If wired distribution of master clock signal is used, then clock synchronization precision is improved, but modification difficulty increases

Engineering Contradiction:
Improveclock synchronization precisionVSAvoidphysical configuration modifiability
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamic wireless synchronization system where access points can freely join or leave the network without physical reconfiguration. The system dynamically adapts to topology changes by establishing new wireless communication paths and exchanging synchronization packets, allowing easy modification of physical configuration while maintaining precision through continuous software-based clock adjustment

Inventive Principle:
Principle #15Dynamics

3Ease of operation

If wireless transmission is used for clock synchronization, then installation cost and flexibility are improved, but synchronization precision may deteriorate

Engineering Contradiction:
Improveinstallation easeVSAvoidclock synchronization precision
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where access points exchange timestamped packets containing transmission and reception times. Each access point measures the round-trip time and calculates clock skew based on the received timestamps, then adjusts its local clock accordingly. This closed-loop feedback system compensates for wireless transmission variations and maintains high synchronization precision despite the wireless medium

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP2636261B1A wireless access point clock synchronization system
Publication Date: 2020.07.08 DECAWAVE
  • EP2636261B1 patent drawingFigure 1~2
  • EP2636261B1 patent drawingFigure 3
  • EP2636261B1 patent drawingFigure 4

AI summary

In an ultra-wideband ("UWB") network, a central location engine ("CLE") coordinates operation of an anchor access point ("AP"), AP[0], and a plurality of non-anchor AP[x]s. A clock calibration packet ("CCP") transmission method and related apparatus facilitate normalization of CCP time references reported to the CLE by all APs. Implementing a digital phase locked loop ('DPLL") in the CLE facilitates clock normalization. Implementing a DPLL in at least the non-anchor AP[x]s facilitates local clock synchronization, and may improve network efficiency by reducing clock synchronization traffic.