UWB Clock Offset Compensation for Multi-Millisecond CIR Combining

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Solution Overview

Problem

The challenge of clock offset impairments, specifically sampling frequency offset (SFO) and carrier frequency offset (CFO), in ultra-wideband (UWB) multi-millisecond ranging processes leads to CIR smearing and phase wrapping, hindering effective signal integration and ranging accuracy.

Innovation Solution

A low complexity two-stage timing frequency estimation method is employed to compensate for clock offsets by estimating SFO from CIR fragments, compensating CFO using SFO, and combining fine CIR fragments through resampling and phase rotation, reducing implementation complexity while maintaining high performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If multi-millisecond ranging is used to extend coverage range, then ranging distance is improved, but clock offset impairments cause CIR smearing and phase wrapping

Engineering Contradiction:
Improveranging distanceVSAvoidCIR integration accuracy
Core Design Contradiction:
Length of stationary objectVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by estimating and compensating for clock offsets (SFO and CFO) before combining CIR fragments. The method first determines CIR fragments from ranging signals, then applies interpolation and estimates SFO, compensates CFO using the determined SFO, and finally combines the compensated fragments. This preliminary compensation ensures that clock offset impairments are corrected before the critical CIR combining operation, preventing CIR smearing and phase wrapping while maintaining extended ranging distance capability

Inventive Principle:
Principle #10Preliminary action

2Reliability

If CIR fragments are combined to increase SNR ratio, then signal quality is improved, but clock offset causes CIR smearing and phase wrapping

Engineering Contradiction:
Improvesignal-to-noise ratioVSAvoidCIR combining accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing clock offset compensation before CIR fragment combining. The method determines SFO from interpolated CIR fragments, compensates CFO using the determined SFO, and then combines the compensated fragments. This ensures that the harmful effects of clock offsets are eliminated before the SNR-enhancing combining operation, allowing both high signal quality and accurate CIR integration to be achieved simultaneously

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If clock offset compensation is applied to maintain CIR accuracy, then ranging precision is improved, but computational complexity increases

Engineering Contradiction:
Improveranging accuracyVSAvoidcompensation algorithm complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the clock offset compensation process into distinct stages: first determining SFO from CIR fragments, then compensating CFO using the determined SFO, and finally combining compensated fragments. This segmented approach breaks down the complex compensation task into manageable steps, each with a specific function, thereby reducing overall computational complexity while maintaining high ranging accuracy

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses SFO estimation as an intermediary to facilitate CFO compensation. Instead of directly compensating both offsets simultaneously, the method first determines SFO from interpolated CIR fragments and uses this SFO information as a mediator to guide the CFO compensation process. This intermediary approach simplifies the overall compensation algorithm by creating a sequential dependency that reduces computational burden while preserving accuracy

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4651390A1Method of compensating a clock offset between devices in a UWB-MMS ranging process
Publication Date: 2025.11.19 NXP BV
  • EP4651390A1 patent drawingFigure 1
  • EP4651390A1 patent drawingFigure 2
  • EP4651390A1 patent drawingFigure 3

AI summary

A low complexity clock drift estimation scheme for UWB-MMS ranging is proposed, assuming sampling frequency offset (SFO) and carrier frequency offset (CFO) are driven from the same clock source. SFO is first estimated with the multiple CIR fragments, and it is used to compensate the CFO for the CIR fragments. Then a fine CFO estimate is obtained from the compensated CIRs. Combining the coarse SFO and fine CFO estimate to resample and phase rotate the original CIRs can significantly improve the performance for CIR combining, thus, improve the performance for ranging.