UWB Pulse Train Generator Segmentation for SOC Integration

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Solution Overview

Problem

Existing UWB wireless communication systems lack an efficient and easily integrable UWB pulse train generator for generating pulse trains based on transmitted data, particularly for integration with digital SOC systems.

Innovation Solution

A UWB pulse train generator comprising a trigger signal controller, a latch unit, and a pulse train generator that sequentially outputs trigger signals and toggles data bits to produce polarity pulses corresponding to edge transitions, utilizing a transformer with differential current buffers to generate UWB pulse trains.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a conventional UWB pulse train generator is used, then UWB pulse train generation is achieved, but integration with digital SOC systems is difficult and construction is complex

Engineering Contradiction:
Improveintegration with digital SOCVSAvoidgenerator construction
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The generator is divided into three independent functional modules: trigger signal controller, latch unit, and pulse train generator. Each module performs a specific function and can be independently designed and integrated, making the overall system easier to manufacture and integrate with digital SOC while maintaining manageable complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The latch unit serves multiple functions: it stores n-bit data, sequentially toggles the stored data in response to trigger signals, and outputs the toggled data to the pulse train generator. This multi-functionality reduces the number of separate components needed, simplifying the overall construction and improving ease of integration

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If sequential triggering is implemented for n-bit data, then complete UWB pulse train generation is achieved, but power consumption increases

Engineering Contradiction:
Improvepulse train generation accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The latch unit sequentially toggles the stored n-bit data in periodic response to trigger signals, with each bit being toggled at a predetermined time period. This periodic action ensures complete and accurate pulse train generation while allowing the system to remain in a low-power state between triggering events, thus balancing reliability with reduced power consumption

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables efficient generation of UWB pulse trains with reduced power consumption and simplified construction, facilitating easy integration with digital SOC systems.

Implementation Method 1

a transformer 212 having n pair of primary and secondary coils

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentUS7283595B2Ultra wide band pulse train generator
Publication Date: 2007.10.16 SAMSUNG ELECTRONICS CO LTD
  • US7283595B2 patent drawing
  • US7283595B2 patent drawing
  • US7283595B2 patent drawing

AI summary

An ultra wide band (UWB) pulse train generator, which includes a trigger signal controller for sequentially outputting n trigger signals for triggering generation of UWB pulse train in accordance with n bit data to be transmitted at a predetermined time period, a latch unit for loading in parallel the n bit data to be transmitted and sequentially toggling the loaded n bit data by one bit whenever the trigger signal is input from the trigger signal controller, and a pulse train generator for generating polarity pulses corresponding to a direction of an edge transition in accordance with toggling on each output signal of the latch unit.