UWB Sleep-Wake Circuit Using Dual MOSFET Threshold Control

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Solution Overview

Problem

Existing ultra-wideband (UWB) wireless communication systems face challenges in achieving low power operation and precise wake-up times in deep sleep modes, particularly in UWB transmitters and receivers, due to reliance on high power consumption components and lack of precise clock synchronization during sleep cycles.

Innovation Solution

Implementing a dual transistor structure to double the voltage threshold for digital inputs, using a biasless differential transconductance stage, and employing ultra-low power low dropout regulators to reduce power consumption and improve clock synchronization during sleep modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional single transistor structures are used, then circuit simplicity is maintained, but power consumption is high and voltage threshold is insufficient

Engineering Contradiction:
Improvepower consumptionVSAvoidtransistor structure complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent combines a PMOS transistor and an NMOS transistor in parallel configuration to form a dual transistor structure. This merging of complementary transistor types creates a unified circuit element that achieves both low power consumption and doubled voltage threshold, resolving the contradiction between simplicity and performance.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs a composite transistor structure combining different transistor types (PMOS and NMOS) with complementary characteristics. This composite approach leverages the advantages of both transistor types to achieve superior power efficiency and voltage threshold properties that neither transistor type could achieve alone.

Inventive Principle:
Principle #40Composite materials

2Measurement precision

If standard voltage threshold transistors are used, then circuit design is simple, but wake-up time precision in sleep mode is insufficient

Engineering Contradiction:
Improvewake-up time precisionVSAvoidtransistor structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The parallel combination of PMOS and NMOS transistors creates a composite switching element with doubled effective voltage threshold. This merged structure provides precise wake-up timing control in sleep mode while maintaining relatively simple circuit integration.

Inventive Principle:
Principle #5Merging (Combining)

3Power

If high current consumption components are used, then signal strength is sufficient, but power consumption is high

Engineering Contradiction:
Improvesignal strengthVSAvoidpower consumption
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The patent uses a composite transistor structure combining PMOS and NMOS devices that operate complementarily. This composite approach achieves sufficient signal strength through coordinated operation of both transistor types while maintaining ultra-low power consumption, particularly in sleep mode.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentEP3942682B1Method of providing an electronic device
Publication Date: 2025.11.26 NABKI FREDERIC
  • EP3942682B1 patent drawingFigure 1
  • EP3942682B1 patent drawingFigure 2~3A
  • EP3942682B1 patent drawingFigure 3B~3C

AI summary

Ultra-Wideband (UWB) wireless technology transmits digital data as modulated coded impulses over a very wide frequency spectrum with very low power over a short distance. To support extended operation, particularly with battery power sources, the inventors have established UWB devices which support wake-up from deep sleep modes when these devices exploit low frequency clock sources for ultra-low power consumption. Further, power consumption may be reduced by exploiting transistors or so-called compounded MOSFET structures whose effective gain and output resistance exceeds any single transistor irrespective of length or by employing biasless low power differential (exponential) transconductance stages within operational transconductance amplifiers in order to provide very high gain low power amplification stages. Further, the inventors have established voltage reference sources that consume very low current, a few nA, and ultra-low power low dropout regulators.